--- /dev/null
+From 7c8d51848a88aafdb68f42b6b650c83485ea2f84 Mon Sep 17 00:00:00 2001
+From: Mathias Krause <minipli@googlemail.com>
+Date: Wed, 30 May 2012 01:43:08 +0200
+Subject: crypto: aesni-intel - fix unaligned cbc decrypt for x86-32
+
+From: Mathias Krause <minipli@googlemail.com>
+
+commit 7c8d51848a88aafdb68f42b6b650c83485ea2f84 upstream.
+
+The 32 bit variant of cbc(aes) decrypt is using instructions requiring
+128 bit aligned memory locations but fails to ensure this constraint in
+the code. Fix this by loading the data into intermediate registers with
+load unaligned instructions.
+
+This fixes reported general protection faults related to aesni.
+
+References: https://bugzilla.kernel.org/show_bug.cgi?id=43223
+Reported-by: Daniel <garkein@mailueberfall.de>
+Signed-off-by: Mathias Krause <minipli@googlemail.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/crypto/aesni-intel_asm.S | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/x86/crypto/aesni-intel_asm.S
++++ b/arch/x86/crypto/aesni-intel_asm.S
+@@ -2460,10 +2460,12 @@ ENTRY(aesni_cbc_dec)
+ pxor IN3, STATE4
+ movaps IN4, IV
+ #else
+- pxor (INP), STATE2
+- pxor 0x10(INP), STATE3
+ pxor IN1, STATE4
+ movaps IN2, IV
++ movups (INP), IN1
++ pxor IN1, STATE2
++ movups 0x10(INP), IN2
++ pxor IN2, STATE3
+ #endif
+ movups STATE1, (OUTP)
+ movups STATE2, 0x10(OUTP)