arm64: dts: renesas: rzg2l-smarc: Enable GPT on carrier board

The GPT4 IOs are available on the carrier board's PMOD0 connector (J1).
Enable the GPT on the carrier board by adding the GPT pinmux and node on
the carrier board dtsi file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250424054050.28310-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
index 568d49cfe44a6b88f0a1923a09ec3563a3eca84c..b36749f94ccbddd9a41be52bb250cb017e4498ae 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
@@ -27,6 +27,13 @@
 #error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"
 #endif
 
+/*
+ * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the
+ * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT        1"
+ * below.
+ */
+#define PMOD0_GPT      0
+
 #include "r9a07g044l2.dtsi"
 #include "rzg2l-smarc-som.dtsi"
 #include "rzg2l-smarc-pinfunction.dtsi"

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
index b3e6016880dda537e535cea7e321bff1c2dfca17..43c456ffa63cf525c1b6c2cbcfeb9b613c6a5e03 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
@@ -26,6 +26,13 @@
 #error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0"
 #endif
 
+/*
+ * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the
+ * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT        1"
+ * below.
+ */
+#define PMOD0_GPT      0
+
 #include "r9a07g054l2.dtsi"
 #include "rzg2l-smarc-som.dtsi"
 #include "rzg2l-smarc-pinfunction.dtsi"

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi
index e9f244c33d558e63467c9ca44b3951a5ac8e51ba..2616dbde4dd597dd129159f94d9326be71413eda 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-pinfunction.dtsi
@@ -38,6 +38,11 @@
                line-name = "can1_stb";
        };
 
+       gpt_pins: gpt {
+               pinmux = <RZG2L_PORT_PINMUX(43, 0, 2)>, /* GTIOC4A */
+                        <RZG2L_PORT_PINMUX(43, 1, 2)>; /* GTIOC4B */
+       };
+
        i2c0_pins: i2c0 {
                pins = "RIIC0_SDA", "RIIC0_SCL";
                input-enable;

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 789f7b0b5ebcadc775f8b59897b3c0feb0b3525a..b76b55e7f09dfb66304a1b686639976685d7800f 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -104,6 +104,14 @@
        };
 };
 
+#if PMOD0_GPT
+&gpt {
+       pinctrl-0 = <&gpt_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+#endif /* PMOD0_GPT */
+
 &i2c3 {
        pinctrl-0 = <&i2c3_pins>;
        pinctrl-names = "default";