]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
3.4-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 7 Jul 2014 18:34:45 +0000 (11:34 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 7 Jul 2014 18:34:45 +0000 (11:34 -0700)
added patches:
drm-vmwgfx-fix-incorrect-write-to-read-only-register-v2.patch

queue-3.4/drm-vmwgfx-fix-incorrect-write-to-read-only-register-v2.patch [new file with mode: 0644]
queue-3.4/series

diff --git a/queue-3.4/drm-vmwgfx-fix-incorrect-write-to-read-only-register-v2.patch b/queue-3.4/drm-vmwgfx-fix-incorrect-write-to-read-only-register-v2.patch
new file mode 100644 (file)
index 0000000..d15275b
--- /dev/null
@@ -0,0 +1,39 @@
+From 4e578080ed3262ed2c3985868539bc66218d25c0 Mon Sep 17 00:00:00 2001
+From: Thomas Hellstrom <thellstrom@vmware.com>
+Date: Wed, 2 Jul 2014 15:47:04 +0200
+Subject: drm/vmwgfx: Fix incorrect write to read-only register v2:
+
+From: Thomas Hellstrom <thellstrom@vmware.com>
+
+commit 4e578080ed3262ed2c3985868539bc66218d25c0 upstream.
+
+Commit "drm/vmwgfx: correct fb_fix_screeninfo.line_length", while fixing a
+vmwgfx fbdev bug, also writes the pitch to a supposedly read-only register:
+SVGA_REG_BYTES_PER_LINE, while it should be (and also in fact is) written to
+SVGA_REG_PITCHLOCK.
+
+This patch is Cc'd stable because of the unknown effects writing to this
+register might have, particularly on older device versions.
+
+v2: Updated log message.
+
+Cc: Christopher Friedt <chrisfriedt@gmail.com>
+Tested-by: Christopher Friedt <chrisfriedt@gmail.com>
+Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
+Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/vmwgfx/vmwgfx_fb.c |    1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+@@ -179,7 +179,6 @@ static int vmw_fb_set_par(struct fb_info
+               vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, info->var.yoffset);
+               vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, info->var.xres);
+               vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, info->var.yres);
+-              vmw_write(vmw_priv, SVGA_REG_BYTES_PER_LINE, info->fix.line_length);
+               vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
+       }
index fd5c4c95075a5d08556a05c7c05cbbd51710cbf6..d668b18e43b4041136980c40783322c743ed0180 100644 (file)
@@ -12,3 +12,4 @@ mtd-pxa3xx_nand-make-the-driver-work-on-big-endian-systems.patch
 drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch
 drm-radeon-fix-typo-in-radeon_connector_is_dp12_capable.patch
 drm-radeon-atom-fix-dithering-on-certain-panels.patch
+drm-vmwgfx-fix-incorrect-write-to-read-only-register-v2.patch