clk: imx: rename video_pll1 to video_pll

[backport from linux commit bedcf9d1dcf88ed38731f0ac9620e5a421e1e9d6]

Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.

No functional changes intended.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221219113127.528282-3-dario.binacchi@amarulasolutions.com

diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 86fe30ae666225baec24ec9a5ca09676da4a3971..a2c7c63ef74d52934aa35ed25d441c04ca173f7a 100644 (file)
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -28,20 +28,20 @@ static const char *imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll
                                        "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", };
 
 static const char *imx8mn_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m",
-                                       "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", };
+                                       "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll_out", };
 
 static const char *imx8mn_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m",
-                                            "sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out", };
+                                            "sys_pll2_200m", "audio_pll1_out", "video_pll_out", "sys_pll3_out", };
 
 #ifndef CONFIG_SPL_BUILD
 static const char *imx8mn_enet_ref_sels[] = {"clock-osc-24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m",
-                                            "sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4", };
+                                            "sys_pll1_160m", "audio_pll1_out", "video_pll_out", "clk_ext4", };
 
 static const char *imx8mn_enet_timer_sels[] = {"clock-osc-24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2",
-                                              "clk_ext3", "clk_ext4", "video_pll1_out", };
+                                              "clk_ext3", "clk_ext4", "video_pll_out", };
 
 static const char *imx8mn_enet_phy_sels[] = {"clock-osc-24m", "sys_pll2_50m", "sys_pll2_125m", "sys_pll2_200m",
-                                            "sys_pll2_500m", "video_pll1_out", "audio_pll2_out", };
+                                            "sys_pll2_500m", "video_pll_out", "audio_pll2_out", };
 #endif
 
 static const char *imx8mn_nand_usdhc_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_200m",
@@ -72,16 +72,16 @@ static const char *imx8mn_ecspi3_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1
 #endif
 
 static const char *imx8mn_i2c1_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
-                                        "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+                                        "video_pll_out", "audio_pll2_out", "sys_pll1_133m", };
 
 static const char *imx8mn_i2c2_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
-                                        "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+                                        "video_pll_out", "audio_pll2_out", "sys_pll1_133m", };
 
 static const char *imx8mn_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
-                                        "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+                                        "video_pll_out", "audio_pll2_out", "sys_pll1_133m", };
 
 static const char *imx8mn_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
-                                        "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+                                        "video_pll_out", "audio_pll2_out", "sys_pll1_133m", };
 
 static const char *imx8mn_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_160m", "m7_alt_pll",
                                         "sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", };
@@ -94,7 +94,7 @@ static const char *imx8mn_qspi_sels[] = {"clock-osc-24m", "sys_pll1_400m", "sys_
 
 static const char * const imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out",
                                                "sys_pll1_400m", "audio_pll2_out", "sys_pll3_out",
-                                               "sys_pll2_250m", "video_pll1_out", };
+                                               "sys_pll2_250m", "video_pll_out", };
 
 static const char * const imx8mn_usb_core_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m",
                                                "sys_pll2_100m", "sys_pll2_200m", "clk_ext2",