]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ACPI: CPPC: Add cppc_set_reg_val()
authorLifeng Zheng <zhenglifeng1@huawei.com>
Fri, 11 Apr 2025 09:38:52 +0000 (17:38 +0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Wed, 30 Apr 2025 20:01:30 +0000 (22:01 +0200)
Add cppc_set_reg_val() as a generic function for setting CPPC register
values, with this features:

 1. Check register. If a register is writeable, it must be a buffer and
    can not be null.

 2. Extract the operations if register is in PCC out as
    cppc_set_reg_val_in_pcc().

This function can be used to reduce some existing code duplication.

Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://patch.msgid.link/20250411093855.982491-6-zhenglifeng1@huawei.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/acpi/cppc_acpi.c

index 14dd206b4454d83daaab46ae12241fa4ae0e9d05..e8236ec0fd0d9871c31bcd8d8716a7c8ac3af5e2 100644 (file)
@@ -1232,6 +1232,55 @@ static int cppc_get_reg_val(int cpu, enum cppc_regs reg_idx, u64 *val)
        return cpc_read(cpu, reg, val);
 }
 
+static int cppc_set_reg_val_in_pcc(int cpu, struct cpc_register_resource *reg, u64 val)
+{
+       int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
+       struct cppc_pcc_data *pcc_ss_data = NULL;
+       int ret;
+
+       if (pcc_ss_id < 0) {
+               pr_debug("Invalid pcc_ss_id\n");
+               return -ENODEV;
+       }
+
+       ret = cpc_write(cpu, reg, val);
+       if (ret)
+               return ret;
+
+       pcc_ss_data = pcc_data[pcc_ss_id];
+
+       down_write(&pcc_ss_data->pcc_lock);
+       /* after writing CPC, transfer the ownership of PCC to platform */
+       ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);
+       up_write(&pcc_ss_data->pcc_lock);
+
+       return ret;
+}
+
+static int cppc_set_reg_val(int cpu, enum cppc_regs reg_idx, u64 val)
+{
+       struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
+       struct cpc_register_resource *reg;
+
+       if (!cpc_desc) {
+               pr_debug("No CPC descriptor for CPU:%d\n", cpu);
+               return -ENODEV;
+       }
+
+       reg = &cpc_desc->cpc_regs[reg_idx];
+
+       /* if a register is writeable, it must be a buffer and not null */
+       if ((reg->type != ACPI_TYPE_BUFFER) || IS_NULL_REG(&reg->cpc_entry.reg)) {
+               pr_debug("CPC register is not supported\n");
+               return -EOPNOTSUPP;
+       }
+
+       if (CPC_IN_PCC(reg))
+               return cppc_set_reg_val_in_pcc(cpu, reg, val);
+
+       return cpc_write(cpu, reg, val);
+}
+
 /**
  * cppc_get_desired_perf - Get the desired performance register value.
  * @cpunum: CPU from which to get desired performance.