+2013-01-15 Sofiane Naci <sofiane.naci@arm.com>
+
+ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Update
+ loop start address for cache clearing.
+
2013-01-14 Georg-Johann Lay <avr@gjlay.de>
* config/avr/lib1funcs.S: Remove trailing blanks.
instruction cache fetches the updated data. 'end' is exclusive,
as per the GNU definition of __clear_cache. */
- for (address = base; address < (const char *) end; address += dcache_lsize)
+ /* Make the start address of the loop cache aligned. */
+ address = (const char*) ((unsigned long) base & ~ (dcache_lsize - 1));
+
+ for (address; address < (const char *) end; address += dcache_lsize)
asm volatile ("dc\tcvau, %0"
:
: "r" (address)
asm volatile ("dsb\tish" : : : "memory");
- for (address = base; address < (const char *) end; address += icache_lsize)
+ /* Make the start address of the loop cache aligned. */
+ address = (const char*) ((unsigned long) base & ~ (icache_lsize - 1));
+
+ for (address; address < (const char *) end; address += icache_lsize)
asm volatile ("ic\tivau, %0"
:
: "r" (address)