]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915/dram: allocate struct dram_info dynamically
authorJani Nikula <jani.nikula@intel.com>
Tue, 27 May 2025 09:25:26 +0000 (12:25 +0300)
committerJani Nikula <jani.nikula@intel.com>
Wed, 4 Jun 2025 15:57:23 +0000 (18:57 +0300)
Allocate struct drm_info dynamically, and convert the struct
drm_i915_private and struct xe_device dram_info member into a const
pointer. Move the struct definition to intel_dram.h, and keep it opaque
to everyone not needing it. This also removes the duplication of the
struct definition.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://lore.kernel.org/r/73625095157346ea0e8614108c9b369208e5df66.1748337870.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/soc/intel_dram.c
drivers/gpu/drm/i915/soc/intel_dram.h
drivers/gpu/drm/xe/xe_device_types.h

index 455548cbd82066d9f008ea00d880bc4f184ceb43..5e4c49f0d5d4ccadb620fc829448a39c4c17a19f 100644 (file)
@@ -60,6 +60,7 @@
 #include "intel_step.h"
 #include "intel_uncore.h"
 
+struct dram_info;
 struct drm_i915_clock_gating_funcs;
 struct intel_display;
 struct intel_pxp;
@@ -282,25 +283,7 @@ struct drm_i915_private {
        u32 suspend_count;
        struct vlv_s0ix_state *vlv_s0ix_state;
 
-       struct dram_info {
-               bool wm_lv_0_adjust_needed;
-               u8 num_channels;
-               bool symmetric_memory;
-               enum intel_dram_type {
-                       INTEL_DRAM_UNKNOWN,
-                       INTEL_DRAM_DDR3,
-                       INTEL_DRAM_DDR4,
-                       INTEL_DRAM_LPDDR3,
-                       INTEL_DRAM_LPDDR4,
-                       INTEL_DRAM_DDR5,
-                       INTEL_DRAM_LPDDR5,
-                       INTEL_DRAM_GDDR,
-                       INTEL_DRAM_GDDR_ECC,
-                       __INTEL_DRAM_TYPE_MAX,
-               } type;
-               u8 num_qgv_points;
-               u8 num_psf_gv_points;
-       } dram_info;
+       const struct dram_info *dram_info;
 
        struct intel_runtime_pm runtime_pm;
 
index e7fa938c98cfeb0512d3a4aff69b0e941c34b3f5..59032c939d0f4d0df3ee1946c4110d6db54c70d5 100644 (file)
@@ -5,6 +5,8 @@
 
 #include <linux/string_helpers.h>
 
+#include <drm/drm_managed.h>
+
 #include "../display/intel_display_core.h" /* FIXME */
 
 #include "i915_drv.h"
@@ -706,7 +708,7 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
 
 int intel_dram_detect(struct drm_i915_private *i915)
 {
-       struct dram_info *dram_info = &i915->dram_info;
+       struct dram_info *dram_info;
        int ret;
 
        detect_fsb_freq(i915);
@@ -715,6 +717,12 @@ int intel_dram_detect(struct drm_i915_private *i915)
        if (GRAPHICS_VER(i915) < 9 || IS_DG2(i915) || !HAS_DISPLAY(i915))
                return 0;
 
+       dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+       if (!dram_info)
+               return -ENOMEM;
+
+       i915->dram_info = dram_info;
+
        /*
         * Assume level 0 watermark latency adjustment is needed until proven
         * otherwise, this w/a is not needed by bxt/glk.
@@ -749,11 +757,16 @@ int intel_dram_detect(struct drm_i915_private *i915)
        return 0;
 }
 
+/*
+ * Returns NULL for platforms that don't have dram info. Avoid overzealous NULL
+ * checks, and prefer not dereferencing on platforms that shouldn't look at dram
+ * info, to catch accidental and incorrect dram info checks.
+ */
 const struct dram_info *intel_dram_info(struct drm_device *drm)
 {
        struct drm_i915_private *i915 = to_i915(drm);
 
-       return &i915->dram_info;
+       return i915->dram_info;
 }
 
 static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
index 25fe60b2b11783bcf0dba6b50fe02306e6d5bf21..2a696e03aad49f5d7f7ee071601ebb2dd19af5fa 100644 (file)
@@ -6,9 +6,30 @@
 #ifndef __INTEL_DRAM_H__
 #define __INTEL_DRAM_H__
 
+#include <linux/types.h>
+
 struct drm_i915_private;
 struct drm_device;
-struct dram_info;
+
+struct dram_info {
+       bool wm_lv_0_adjust_needed;
+       u8 num_channels;
+       bool symmetric_memory;
+       enum intel_dram_type {
+               INTEL_DRAM_UNKNOWN,
+               INTEL_DRAM_DDR3,
+               INTEL_DRAM_DDR4,
+               INTEL_DRAM_LPDDR3,
+               INTEL_DRAM_LPDDR4,
+               INTEL_DRAM_DDR5,
+               INTEL_DRAM_LPDDR5,
+               INTEL_DRAM_GDDR,
+               INTEL_DRAM_GDDR_ECC,
+               __INTEL_DRAM_TYPE_MAX,
+       } type;
+       u8 num_qgv_points;
+       u8 num_psf_gv_points;
+};
 
 void intel_dram_edram_detect(struct drm_i915_private *i915);
 int intel_dram_detect(struct drm_i915_private *i915);
index 5c56f0d96e32e97a3f4d5ba5db9331e0e50b8375..bbbf9e0f2cadd0b73ef75dac8c1f92d0c72fe622 100644 (file)
@@ -30,6 +30,7 @@
 #define TEST_VM_OPS_ERROR
 #endif
 
+struct dram_info;
 struct intel_display;
 struct xe_ggtt;
 struct xe_pat_ops;
@@ -585,25 +586,7 @@ struct xe_device {
         */
        struct intel_display *display;
 
-       struct dram_info {
-               bool wm_lv_0_adjust_needed;
-               u8 num_channels;
-               bool symmetric_memory;
-               enum intel_dram_type {
-                       INTEL_DRAM_UNKNOWN,
-                       INTEL_DRAM_DDR3,
-                       INTEL_DRAM_DDR4,
-                       INTEL_DRAM_LPDDR3,
-                       INTEL_DRAM_LPDDR4,
-                       INTEL_DRAM_DDR5,
-                       INTEL_DRAM_LPDDR5,
-                       INTEL_DRAM_GDDR,
-                       INTEL_DRAM_GDDR_ECC,
-                       __INTEL_DRAM_TYPE_MAX,
-               } type;
-               u8 num_qgv_points;
-               u8 num_psf_gv_points;
-       } dram_info;
+       const struct dram_info *dram_info;
 
        /*
         * edram size in MB.