--- /dev/null
+From 0ac8cbdacba97c6d2e6c3566e4b3d9fa9c479973 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 12 Sep 2022 09:53:25 -0700
+Subject: block: blk_queue_enter() / __bio_queue_enter() must return -EAGAIN
+ for nowait
+
+From: Stefan Roesch <shr@fb.com>
+
+[ Upstream commit 56f99b8d06ef1ed1c9730948f9f05ac2b930a20b ]
+
+Today blk_queue_enter() and __bio_queue_enter() return -EBUSY for the
+nowait code path. This is not correct: they should return -EAGAIN
+instead.
+
+This problem was detected by fio. The following command exposed the
+above problem:
+
+t/io_uring -p0 -d128 -b4096 -s32 -c32 -F1 -B0 -R0 -X1 -n24 -P1 -u1 -O0 /dev/ng0n1
+
+By applying the patch, the retry case is handled correctly in the slow
+path.
+
+Signed-off-by: Stefan Roesch <shr@fb.com>
+Fixes: bfd343aa1718 ("blk-mq: don't wait in blk_mq_queue_enter() if __GFP_WAIT isn't set")
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ block/blk-core.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/block/blk-core.c b/block/blk-core.c
+index 27fb1357ad4b..cc6fbcb6d252 100644
+--- a/block/blk-core.c
++++ b/block/blk-core.c
+@@ -338,7 +338,7 @@ int blk_queue_enter(struct request_queue *q, blk_mq_req_flags_t flags)
+
+ while (!blk_try_enter_queue(q, pm)) {
+ if (flags & BLK_MQ_REQ_NOWAIT)
+- return -EBUSY;
++ return -EAGAIN;
+
+ /*
+ * read pair of barrier in blk_freeze_queue_start(), we need to
+@@ -368,7 +368,7 @@ int __bio_queue_enter(struct request_queue *q, struct bio *bio)
+ if (test_bit(GD_DEAD, &disk->state))
+ goto dead;
+ bio_wouldblock_error(bio);
+- return -EBUSY;
++ return -EAGAIN;
+ }
+
+ /*
+--
+2.35.1
+
--- /dev/null
+From 7b1f0585e0fce26daaff10fa213f164baaf25872 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sat, 27 Aug 2022 00:21:35 +0000
+Subject: drm/i915/guc: Cancel GuC engine busyness worker synchronously
+
+From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
+
+[ Upstream commit aee5ae7c8492eaca2be20d202887c9c716ffc86f ]
+
+The worker is canceled in gt_park path, but earlier it was assumed that
+gt_park path cannot sleep and the cancel is asynchronous. This caused a
+race with suspend flow where the worker runs after suspend and causes an
+unclaimed register access warning. Cancel the worker synchronously since
+the gt_park is indeed allowed to sleep.
+
+v2: Fix author name and sign-off mismatch
+
+Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
+Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4419
+Fixes: 77cdd054dd2c ("drm/i915/pmu: Connect engine busyness stats from GuC to pmu")
+Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
+Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220827002135.139349-1-umesh.nerlige.ramappa@intel.com
+Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
+(cherry picked from commit 31335aa8e08be3fe10c50aecd2f11aba77544a78)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+index 96022f49f9b5..d7e4681d7297 100644
+--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
++++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+@@ -1438,7 +1438,12 @@ void intel_guc_busyness_park(struct intel_gt *gt)
+ if (!guc_submission_initialized(guc))
+ return;
+
+- cancel_delayed_work(&guc->timestamp.work);
++ /*
++ * There is a race with suspend flow where the worker runs after suspend
++ * and causes an unclaimed register access warning. Cancel the worker
++ * synchronously here.
++ */
++ cancel_delayed_work_sync(&guc->timestamp.work);
+
+ /*
+ * Before parking, we should sample engine busyness stats if we need to.
+--
+2.35.1
+
--- /dev/null
+From 274f992559949f10157934670865eee0d602b423 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 22 Jun 2022 19:31:57 -0700
+Subject: drm/i915/guc: Don't update engine busyness stats too frequently
+
+From: Alan Previn <alan.previn.teres.alexis@intel.com>
+
+[ Upstream commit 59bcdb564b3bac3e86cc274e5dec05d4647ce47f ]
+
+Using two different types of workoads, it was observed that
+guc_update_engine_gt_clks was being called too frequently and/or
+causing a CPU-to-lmem bandwidth hit over PCIE. Details on
+the workloads and numbers are in the notes below.
+
+Background: At the moment, guc_update_engine_gt_clks can be invoked
+via one of 3 ways. #1 and #2 are infrequent under normal operating
+conditions:
+ 1.When a predefined "ping_delay" timer expires so that GuC-
+ busyness can sample the GTPM clock counter to ensure it
+ doesn't miss a wrap-around of the 32-bits of the HW counter.
+ (The ping_delay is calculated based on 1/8th the time taken
+ for the counter go from 0x0 to 0xffffffff based on the
+ GT frequency. This comes to about once every 28 seconds at a
+ GT frequency of 19.2Mhz).
+ 2.In preparation for a gt reset.
+ 3.In response to __gt_park events (as the gt power management
+ puts the gt into a lower power state when there is no work
+ being done).
+
+Root-cause: For both the workloads described farther below, it was
+observed that when user space calls IOCTLs that unparks the
+gt momentarily and repeats such calls many times in quick succession,
+it triggers calling guc_update_engine_gt_clks as many times. However,
+the primary purpose of guc_update_engine_gt_clks is to ensure we don't
+miss the wraparound while the counter is ticking. Thus, the solution
+is to ensure we skip that check if gt_park is calling this function
+earlier than necessary.
+
+Solution: Snapshot jiffies when we do actually update the busyness
+stats. Then get the new jiffies every time intel_guc_busyness_park
+is called and bail if we are being called too soon. Use half of the
+ping_delay as a safe threshold.
+
+NOTE1: Workload1: IGTs' gem_create was modified to create a file handle,
+allocate memory with sizes that range from a min of 4K to the max supported
+(in power of two step-sizes). Its maps, modifies and reads back the
+memory. Allocations and modification is repeated until total memory
+allocation reaches the max. Then the file handle is closed. With this
+workload, guc_update_engine_gt_clks was called over 188 thousand times
+in the span of 15 seconds while this test ran three times. With this patch,
+the number of calls reduced to 14.
+
+NOTE2: Workload2: 30 transcode sessions are created in quick succession.
+While these sessions are created, pcm-iio tool was used to measure I/O
+read operation bandwidth consumption sampled at 100 milisecond intervals
+over the course of 20 seconds. The total bandwidth consumed over 20 seconds
+without this patch was measured at average at 311KBps per sample. With this
+patch, the number went down to about 175Kbps which is about a 43% savings.
+
+Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
+Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
+Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220623023157.211650-2-alan.previn.teres.alexis@intel.com
+Stable-dep-of: aee5ae7c8492 ("drm/i915/guc: Cancel GuC engine busyness worker synchronously")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/i915/gt/uc/intel_guc.h | 8 ++++++++
+ drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 13 +++++++++++++
+ 2 files changed, 21 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+index 9feda105f913..a7acffbf15d1 100644
+--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
++++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+@@ -235,6 +235,14 @@ struct intel_guc {
+ * @shift: Right shift value for the gpm timestamp
+ */
+ u32 shift;
++
++ /**
++ * @last_stat_jiffies: jiffies at last actual stats collection time
++ * We use this timestamp to ensure we don't oversample the
++ * stats because runtime power management events can trigger
++ * stats collection at much higher rates than required.
++ */
++ unsigned long last_stat_jiffies;
+ } timestamp;
+
+ #ifdef CONFIG_DRM_I915_SELFTEST
+diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+index 26a051ef119d..96022f49f9b5 100644
+--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
++++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+@@ -1365,6 +1365,8 @@ static void __update_guc_busyness_stats(struct intel_guc *guc)
+ unsigned long flags;
+ ktime_t unused;
+
++ guc->timestamp.last_stat_jiffies = jiffies;
++
+ spin_lock_irqsave(&guc->timestamp.lock, flags);
+
+ guc_update_pm_timestamp(guc, &unused);
+@@ -1437,6 +1439,17 @@ void intel_guc_busyness_park(struct intel_gt *gt)
+ return;
+
+ cancel_delayed_work(&guc->timestamp.work);
++
++ /*
++ * Before parking, we should sample engine busyness stats if we need to.
++ * We can skip it if we are less than half a ping from the last time we
++ * sampled the busyness stats.
++ */
++ if (guc->timestamp.last_stat_jiffies &&
++ !time_after(jiffies, guc->timestamp.last_stat_jiffies +
++ (guc->timestamp.ping_delay / 2)))
++ return;
++
+ __update_guc_busyness_stats(guc);
+ }
+
+--
+2.35.1
+
--- /dev/null
+From abc0ec60e779ce7752d32532019a85fa83a28fcb Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 2 Sep 2022 16:02:19 +0530
+Subject: drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSC
+
+From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+
+[ Upstream commit 0785691f5711a8f210bb15a5177c2999ebd3702e ]
+
+Currently, pic_height of vdsc_cfg structure is being used to calculate
+slice_height, before it is set for DP.
+
+So taking out the lines to set pic_height from the helper
+intel_dp_dsc_compute_params() to individual encoders, and setting
+pic_height, before it is used to calculate slice_height for DP.
+
+Fixes: 5a6d866f8e1b ("drm/i915: Get slice height before computing rc params")
+Cc: Manasi Navare <manasi.d.navare@intel.com>
+Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
+Cc: Matt Roper <matthew.d.roper@intel.com>
+Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220902103219.1168781-1-ankit.k.nautiyal@intel.com
+(cherry picked from commit e72df53dcb01ec58e0410da353551adf94c8d0f1)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/i915/display/icl_dsi.c | 2 ++
+ drivers/gpu/drm/i915/display/intel_dp.c | 1 +
+ drivers/gpu/drm/i915/display/intel_vdsc.c | 1 -
+ 3 files changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
+index 19bf717fd4cb..5508ebb9eb43 100644
+--- a/drivers/gpu/drm/i915/display/icl_dsi.c
++++ b/drivers/gpu/drm/i915/display/icl_dsi.c
+@@ -1629,6 +1629,8 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
+ /* FIXME: initialize from VBT */
+ vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
+
++ vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay;
++
+ ret = intel_dsc_compute_params(crtc_state);
+ if (ret)
+ return ret;
+diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
+index 41aaa6c98114..fe8b6b72970a 100644
+--- a/drivers/gpu/drm/i915/display/intel_dp.c
++++ b/drivers/gpu/drm/i915/display/intel_dp.c
+@@ -1379,6 +1379,7 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
+ * DP_DSC_RC_BUF_SIZE for this.
+ */
+ vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
++ vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay;
+
+ /*
+ * Slice Height of 8 works for all currently available panels. So start
+diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
+index 43e1bbc1e303..ca530f0733e0 100644
+--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
++++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
+@@ -460,7 +460,6 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
+ u8 i = 0;
+
+ vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
+- vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
+ vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
+ pipe_config->dsc.slice_count);
+
+--
+2.35.1
+
--- /dev/null
+From 5d5080263d5f182920bf2568b13531be66805b8a Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 8 Sep 2022 16:51:03 +0100
+Subject: drm/meson: Correct OSD1 global alpha value
+
+From: Stuart Menefy <stuart.menefy@mathembedded.com>
+
+[ Upstream commit 6836829c8ea453c9e3e518e61539e35881c8ed5f ]
+
+VIU_OSD1_CTRL_STAT.GLOBAL_ALPHA is a 9 bit field, so the maximum
+value is 0x100 not 0xff.
+
+This matches the vendor kernel.
+
+Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
+Fixes: bbbe775ec5b5 ("drm: Add support for Amlogic Meson Graphic Controller")
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220908155103.686904-1-stuart.menefy@mathembedded.com
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/meson/meson_plane.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
+index 8640a8a8a469..44aa52629443 100644
+--- a/drivers/gpu/drm/meson/meson_plane.c
++++ b/drivers/gpu/drm/meson/meson_plane.c
+@@ -168,7 +168,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
+
+ /* Enable OSD and BLK0, set max global alpha */
+ priv->viu.osd1_ctrl_stat = OSD_ENABLE |
+- (0xFF << OSD_GLOBAL_ALPHA_SHIFT) |
++ (0x100 << OSD_GLOBAL_ALPHA_SHIFT) |
+ OSD_BLK0_ENABLE;
+
+ priv->viu.osd1_ctrl_stat2 = readl(priv->io_base +
+--
+2.35.1
+
--- /dev/null
+From 8b1b28fb70ca7bbc4a49f25d3a73178cda30f09d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 8 Sep 2022 16:52:43 +0100
+Subject: drm/meson: Fix OSD1 RGB to YCbCr coefficient
+
+From: Stuart Menefy <stuart.menefy@mathembedded.com>
+
+[ Upstream commit 6463d3930ba5b6addcfc8f80a4543976a2fc7656 ]
+
+VPP_WRAP_OSD1_MATRIX_COEF22.Coeff22 is documented as being bits 0-12,
+not 16-28.
+
+Without this the output tends to have a pink hue, changing it results
+in better color accuracy.
+
+The vendor kernel doesn't use this register. However the code which
+sets VIU2_OSD1_MATRIX_COEF22 also uses bits 0-12. There is a slightly
+different style of registers for configuring some of the other matrices,
+which do use bits 16-28 for this coefficient, but those have names
+ending in MATRIX_COEF22_30, and this is not one of those.
+
+Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
+Fixes: 728883948b0d ("drm/meson: Add G12A Support for VIU setup")
+Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
+Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220908155243.687143-1-stuart.menefy@mathembedded.com
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/meson/meson_viu.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c
+index bb7e109534de..d4b907889a21 100644
+--- a/drivers/gpu/drm/meson/meson_viu.c
++++ b/drivers/gpu/drm/meson/meson_viu.c
+@@ -94,7 +94,7 @@ static void meson_viu_set_g12a_osd1_matrix(struct meson_drm *priv,
+ priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF11_12));
+ writel(((m[9] & 0x1fff) << 16) | (m[10] & 0x1fff),
+ priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF20_21));
+- writel((m[11] & 0x1fff) << 16,
++ writel((m[11] & 0x1fff),
+ priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_COEF22));
+
+ writel(((m[18] & 0xfff) << 16) | (m[19] & 0xfff),
+--
+2.35.1
+
--- /dev/null
+From b5a477cfe1e8ae8d4b1bc9c917238d2bc90dd95d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 8 Sep 2022 16:54:53 +0800
+Subject: drm/panel-edp: Fix delays for Innolux N116BCA-EA1
+
+From: Chen-Yu Tsai <wenst@chromium.org>
+
+[ Upstream commit 8f7115c1923cd11146525f1615beb29018001964 ]
+
+Commit 52824ca4502d ("drm/panel-edp: Better describe eDP panel delays")
+clarified the various delays used for eDP panels, tying them to the eDP
+panel timing diagram.
+
+For Innolux N116BCA-EA1, .prepare_to_enable would be:
+
+ t4_min + t5_min + t6_min + max(t7_max, t8_min)
+
+Since t4_min and t5_min are both 0, the panel can use either .enable or
+.prepare_to_enable.
+
+As .enable is better defined, switch to using .enable for this panel.
+
+Also add .disable = 50, based on the datasheet's t9_min value. This
+effectively makes the delays the same as delay_200_500_e80_d50.
+
+Cc: Douglas Anderson <dianders@chromium.org>
+Fixes: 51d35631c970 ("drm/panel-simple: Add N116BCA-EA1")
+Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
+Reviewed-by: Douglas Anderson <dianders@chromium.org>
+Signed-off-by: Douglas Anderson <dianders@chromium.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220908085454.1024167-1-wenst@chromium.org
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/panel/panel-edp.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
+index a189982601a4..e8040defe607 100644
+--- a/drivers/gpu/drm/panel/panel-edp.c
++++ b/drivers/gpu/drm/panel/panel-edp.c
+@@ -1270,7 +1270,8 @@ static const struct panel_desc innolux_n116bca_ea1 = {
+ },
+ .delay = {
+ .hpd_absent = 200,
+- .prepare_to_enable = 80,
++ .enable = 80,
++ .disable = 50,
+ .unprepare = 500,
+ },
+ };
+--
+2.35.1
+
--- /dev/null
+From 662c18e901d38b7a1a9fff824581a9ccdffc9aea Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 15 Aug 2022 15:39:42 +0200
+Subject: drm/rockchip: vop2: Fix eDP/HDMI sync polarities
+
+From: Sascha Hauer <s.hauer@pengutronix.de>
+
+[ Upstream commit 35b513a74eabf09bd718e04fd9e62b09c022807f ]
+
+The hsync/vsync polarities were not honoured for the eDP and HDMI ports.
+Add the register settings to configure the polarities as requested by the
+DRM_MODE_FLAG_PHSYNC/DRM_MODE_FLAG_PVSYNC flags.
+
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
+Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Link: https://patchwork.freedesktop.org/patch/msgid/20220815133942.4051532-1-s.hauer@pengutronix.de
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+index d6e831576cd2..88271f04615b 100644
+--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+@@ -1436,11 +1436,15 @@ static void rk3568_set_intf_mux(struct vop2_video_port *vp, int id,
+ die &= ~RK3568_SYS_DSP_INFACE_EN_HDMI_MUX;
+ die |= RK3568_SYS_DSP_INFACE_EN_HDMI |
+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_HDMI_MUX, vp->id);
++ dip &= ~RK3568_DSP_IF_POL__HDMI_PIN_POL;
++ dip |= FIELD_PREP(RK3568_DSP_IF_POL__HDMI_PIN_POL, polflags);
+ break;
+ case ROCKCHIP_VOP2_EP_EDP0:
+ die &= ~RK3568_SYS_DSP_INFACE_EN_EDP_MUX;
+ die |= RK3568_SYS_DSP_INFACE_EN_EDP |
+ FIELD_PREP(RK3568_SYS_DSP_INFACE_EN_EDP_MUX, vp->id);
++ dip &= ~RK3568_DSP_IF_POL__EDP_PIN_POL;
++ dip |= FIELD_PREP(RK3568_DSP_IF_POL__EDP_PIN_POL, polflags);
+ break;
+ case ROCKCHIP_VOP2_EP_MIPI0:
+ die &= ~RK3568_SYS_DSP_INFACE_EN_MIPI0_MUX;
+--
+2.35.1
+
--- /dev/null
+From 69e4296577073a2d410de75ccb845a58c128c621 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 6 Sep 2022 12:54:31 +0200
+Subject: gpio: mpc8xxx: Fix support for IRQ_TYPE_LEVEL_LOW flow_type in
+ mpc85xx
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Pali Rohár <pali@kernel.org>
+
+[ Upstream commit 279c12df8d2efb28def9d037f288cbfb97c30fe2 ]
+
+Commit e39d5ef67804 ("powerpc/5xxx: extend mpc8xxx_gpio driver to support
+mpc512x gpios") implemented support for IRQ_TYPE_LEVEL_LOW flow type in
+mpc512x via falling edge type. Do same for mpc85xx which support was added
+in commit 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio").
+
+Fixes probing of lm90 hwmon driver on mpc85xx based board which use level
+interrupt. Without it kernel prints error and refuse lm90 to work:
+
+ [ 15.258370] genirq: Setting trigger mode 8 for irq 49 failed (mpc8xxx_irq_set_type+0x0/0xf8)
+ [ 15.267168] lm90 0-004c: cannot request IRQ 49
+ [ 15.272708] lm90: probe of 0-004c failed with error -22
+
+Fixes: 345e5c8a1cc3 ("powerpc: Add interrupt support to mpc8xxx_gpio")
+Signed-off-by: Pali Rohár <pali@kernel.org>
+Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpio/gpio-mpc8xxx.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
+index a964e25ea620..763256efddc2 100644
+--- a/drivers/gpio/gpio-mpc8xxx.c
++++ b/drivers/gpio/gpio-mpc8xxx.c
+@@ -172,6 +172,7 @@ static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
+
+ switch (flow_type) {
+ case IRQ_TYPE_EDGE_FALLING:
++ case IRQ_TYPE_LEVEL_LOW:
+ raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
+ gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
+ gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
+--
+2.35.1
+
--- /dev/null
+From 5c7cc29bd44049573d956bd611359ea0a9b73aea Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 25 Aug 2022 14:49:05 -0400
+Subject: NFSv4: Turn off open-by-filehandle and NFS re-export for NFSv4.0
+
+From: Trond Myklebust <trond.myklebust@hammerspace.com>
+
+[ Upstream commit 2a9d683b48c8a87e61a4215792d44c90bcbbb536 ]
+
+The NFSv4.0 protocol only supports open() by name. It cannot therefore
+be used with open_by_handle() and friends, nor can it be re-exported by
+knfsd.
+
+Reported-by: Chuck Lever III <chuck.lever@oracle.com>
+Fixes: 20fa19027286 ("nfs: add export operations")
+Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ fs/nfs/super.c | 27 ++++++++++++++++++---------
+ 1 file changed, 18 insertions(+), 9 deletions(-)
+
+diff --git a/fs/nfs/super.c b/fs/nfs/super.c
+index 6ab5eeb000dc..5e4bacb77bfc 100644
+--- a/fs/nfs/super.c
++++ b/fs/nfs/super.c
+@@ -1051,22 +1051,31 @@ static void nfs_fill_super(struct super_block *sb, struct nfs_fs_context *ctx)
+ if (ctx->bsize)
+ sb->s_blocksize = nfs_block_size(ctx->bsize, &sb->s_blocksize_bits);
+
+- if (server->nfs_client->rpc_ops->version != 2) {
+- /* The VFS shouldn't apply the umask to mode bits. We will do
+- * so ourselves when necessary.
++ switch (server->nfs_client->rpc_ops->version) {
++ case 2:
++ sb->s_time_gran = 1000;
++ sb->s_time_min = 0;
++ sb->s_time_max = U32_MAX;
++ break;
++ case 3:
++ /*
++ * The VFS shouldn't apply the umask to mode bits.
++ * We will do so ourselves when necessary.
+ */
+ sb->s_flags |= SB_POSIXACL;
+ sb->s_time_gran = 1;
+- sb->s_export_op = &nfs_export_ops;
+- } else
+- sb->s_time_gran = 1000;
+-
+- if (server->nfs_client->rpc_ops->version != 4) {
+ sb->s_time_min = 0;
+ sb->s_time_max = U32_MAX;
+- } else {
++ sb->s_export_op = &nfs_export_ops;
++ break;
++ case 4:
++ sb->s_flags |= SB_POSIXACL;
++ sb->s_time_gran = 1;
+ sb->s_time_min = S64_MIN;
+ sb->s_time_max = S64_MAX;
++ if (server->caps & NFS_CAP_ATOMIC_OPEN_V1)
++ sb->s_export_op = &nfs_export_ops;
++ break;
+ }
+
+ sb->s_magic = NFS_SUPER_MAGIC;
+--
+2.35.1
+
--- /dev/null
+From cfb3c76b2680218f91ed39ef783cda9a4c48e43c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 7 Sep 2022 16:34:21 -0400
+Subject: NFSv4.2: Update mode bits after ALLOCATE and DEALLOCATE
+
+From: Anna Schumaker <Anna.Schumaker@Netapp.com>
+
+[ Upstream commit d7a5118635e725d195843bda80cc5c964d93ef31 ]
+
+The fallocate call invalidates suid and sgid bits as part of normal
+operation. We need to mark the mode bits as invalid when using fallocate
+with an suid so these will be updated the next time the user looks at them.
+
+This fixes xfstests generic/683 and generic/684.
+
+Reported-by: Yue Cui <cuiyue-fnst@fujitsu.com>
+Fixes: 913eca1aea87 ("NFS: Fallocate should use the nfs4_fattr_bitmap")
+Signed-off-by: Anna Schumaker <Anna.Schumaker@Netapp.com>
+Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ fs/nfs/internal.h | 25 +++++++++++++++++++++++++
+ fs/nfs/nfs42proc.c | 9 +++++++--
+ fs/nfs/write.c | 25 -------------------------
+ 3 files changed, 32 insertions(+), 27 deletions(-)
+
+diff --git a/fs/nfs/internal.h b/fs/nfs/internal.h
+index 8f8cd6e2d4db..597e3ce3f148 100644
+--- a/fs/nfs/internal.h
++++ b/fs/nfs/internal.h
+@@ -604,6 +604,31 @@ static inline gfp_t nfs_io_gfp_mask(void)
+ return GFP_KERNEL;
+ }
+
++/*
++ * Special version of should_remove_suid() that ignores capabilities.
++ */
++static inline int nfs_should_remove_suid(const struct inode *inode)
++{
++ umode_t mode = inode->i_mode;
++ int kill = 0;
++
++ /* suid always must be killed */
++ if (unlikely(mode & S_ISUID))
++ kill = ATTR_KILL_SUID;
++
++ /*
++ * sgid without any exec bits is just a mandatory locking mark; leave
++ * it alone. If some exec bits are set, it's a real sgid; kill it.
++ */
++ if (unlikely((mode & S_ISGID) && (mode & S_IXGRP)))
++ kill |= ATTR_KILL_SGID;
++
++ if (unlikely(kill && S_ISREG(mode)))
++ return kill;
++
++ return 0;
++}
++
+ /* unlink.c */
+ extern struct rpc_task *
+ nfs_async_rename(struct inode *old_dir, struct inode *new_dir,
+diff --git a/fs/nfs/nfs42proc.c b/fs/nfs/nfs42proc.c
+index 068c45b3bc1a..6dab9e408372 100644
+--- a/fs/nfs/nfs42proc.c
++++ b/fs/nfs/nfs42proc.c
+@@ -78,10 +78,15 @@ static int _nfs42_proc_fallocate(struct rpc_message *msg, struct file *filep,
+
+ status = nfs4_call_sync(server->client, server, msg,
+ &args.seq_args, &res.seq_res, 0);
+- if (status == 0)
++ if (status == 0) {
++ if (nfs_should_remove_suid(inode)) {
++ spin_lock(&inode->i_lock);
++ nfs_set_cache_invalid(inode, NFS_INO_INVALID_MODE);
++ spin_unlock(&inode->i_lock);
++ }
+ status = nfs_post_op_update_inode_force_wcc(inode,
+ res.falloc_fattr);
+-
++ }
+ if (msg->rpc_proc == &nfs4_procedures[NFSPROC4_CLNT_ALLOCATE])
+ trace_nfs4_fallocate(inode, &args, status);
+ else
+diff --git a/fs/nfs/write.c b/fs/nfs/write.c
+index 5d7e1c206184..4212473c69ee 100644
+--- a/fs/nfs/write.c
++++ b/fs/nfs/write.c
+@@ -1497,31 +1497,6 @@ void nfs_commit_prepare(struct rpc_task *task, void *calldata)
+ NFS_PROTO(data->inode)->commit_rpc_prepare(task, data);
+ }
+
+-/*
+- * Special version of should_remove_suid() that ignores capabilities.
+- */
+-static int nfs_should_remove_suid(const struct inode *inode)
+-{
+- umode_t mode = inode->i_mode;
+- int kill = 0;
+-
+- /* suid always must be killed */
+- if (unlikely(mode & S_ISUID))
+- kill = ATTR_KILL_SUID;
+-
+- /*
+- * sgid without any exec bits is just a mandatory locking mark; leave
+- * it alone. If some exec bits are set, it's a real sgid; kill it.
+- */
+- if (unlikely((mode & S_ISGID) && (mode & S_IXGRP)))
+- kill |= ATTR_KILL_SGID;
+-
+- if (unlikely(kill && S_ISREG(mode)))
+- return kill;
+-
+- return 0;
+-}
+-
+ static void nfs_writeback_check_extend(struct nfs_pgio_header *hdr,
+ struct nfs_fattr *fattr)
+ {
+--
+2.35.1
+
--- /dev/null
+From 3c71470b081a809b95a94cc4b412bea43fdeeb2f Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sat, 13 Aug 2022 23:34:16 +0300
+Subject: of: fdt: fix off-by-one error in unflatten_dt_nodes()
+
+From: Sergey Shtylyov <s.shtylyov@omp.ru>
+
+[ Upstream commit 2f945a792f67815abca26fa8a5e863ccf3fa1181 ]
+
+Commit 78c44d910d3e ("drivers/of: Fix depth when unflattening devicetree")
+forgot to fix up the depth check in the loop body in unflatten_dt_nodes()
+which makes it possible to overflow the nps[] buffer...
+
+Found by Linux Verification Center (linuxtesting.org) with the SVACE static
+analysis tool.
+
+Fixes: 78c44d910d3e ("drivers/of: Fix depth when unflattening devicetree")
+Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
+Signed-off-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/7c354554-006f-6b31-c195-cdfe4caee392@omp.ru
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/of/fdt.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
+index 520ed965bb7a..583ca847a39c 100644
+--- a/drivers/of/fdt.c
++++ b/drivers/of/fdt.c
+@@ -314,7 +314,7 @@ static int unflatten_dt_nodes(const void *blob,
+ for (offset = 0;
+ offset >= 0 && depth >= initial_depth;
+ offset = fdt_next_node(blob, offset, &depth)) {
+- if (WARN_ON_ONCE(depth >= FDT_MAX_DEPTH))
++ if (WARN_ON_ONCE(depth >= FDT_MAX_DEPTH - 1))
+ continue;
+
+ if (!IS_ENABLED(CONFIG_OF_KOBJ) &&
+--
+2.35.1
+
--- /dev/null
+From 80846931083ebc7fef7e87be93eaaa47edc624d6 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 7 Aug 2022 20:26:44 +0800
+Subject: pinctrl: qcom: sc8180x: Fix gpio_wakeirq_map
+
+From: Molly Sophia <mollysophia379@gmail.com>
+
+[ Upstream commit 6124cec530c7d8faab96d340ab2df5161e5d1c8a ]
+
+Currently in the wakeirq_map, gpio36 and gpio37 have the same wakeirq
+number, resulting in gpio37 being unable to trigger interrupts.
+It looks like that this is a typo in the wakeirq map. So fix it.
+
+Signed-off-by: Molly Sophia <mollysophia379@gmail.com>
+Fixes: 97423113ec4b ("pinctrl: qcom: Add sc8180x TLMM driver")
+Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Link: https://lore.kernel.org/r/20220807122645.13830-2-mollysophia379@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/qcom/pinctrl-sc8180x.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+index 6bec7f143134..b4bf009fe23e 100644
+--- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c
++++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+@@ -1582,7 +1582,7 @@ static const int sc8180x_acpi_reserved_gpios[] = {
+ static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = {
+ { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 },
+ { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 },
+- { 37, 43 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
++ { 37, 44 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
+ { 42, 48 }, { 46, 50 }, { 47, 49 }, { 48, 51 }, { 49, 53 }, { 50, 52 },
+ { 51, 116 }, { 51, 123 }, { 53, 54 }, { 54, 55 }, { 55, 56 },
+ { 56, 57 }, { 58, 58 }, { 60, 60 }, { 68, 62 }, { 70, 63 }, { 76, 86 },
+--
+2.35.1
+
--- /dev/null
+From 6bd3c8f189d460e135bb74c8698fd5dc82695d44 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 7 Aug 2022 20:26:45 +0800
+Subject: pinctrl: qcom: sc8180x: Fix wrong pin numbers
+
+From: Molly Sophia <mollysophia379@gmail.com>
+
+[ Upstream commit 48ec73395887694f13c9452b4dcfb43710451757 ]
+
+The pin numbers for UFS_RESET and SDC2_* are not
+consistent in the pinctrl driver for sc8180x.
+So fix it.
+
+Signed-off-by: Molly Sophia <mollysophia379@gmail.com>
+Fixes: 97423113ec4b ("pinctrl: qcom: Add sc8180x TLMM driver")
+Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Link: https://lore.kernel.org/r/20220807122645.13830-3-mollysophia379@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/qcom/pinctrl-sc8180x.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+index b4bf009fe23e..704a99d2f93c 100644
+--- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c
++++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c
+@@ -530,10 +530,10 @@ DECLARE_MSM_GPIO_PINS(187);
+ DECLARE_MSM_GPIO_PINS(188);
+ DECLARE_MSM_GPIO_PINS(189);
+
+-static const unsigned int sdc2_clk_pins[] = { 190 };
+-static const unsigned int sdc2_cmd_pins[] = { 191 };
+-static const unsigned int sdc2_data_pins[] = { 192 };
+-static const unsigned int ufs_reset_pins[] = { 193 };
++static const unsigned int ufs_reset_pins[] = { 190 };
++static const unsigned int sdc2_clk_pins[] = { 191 };
++static const unsigned int sdc2_cmd_pins[] = { 192 };
++static const unsigned int sdc2_data_pins[] = { 193 };
+
+ enum sc8180x_functions {
+ msm_mux_adsp_ext,
+--
+2.35.1
+
--- /dev/null
+From e70044c5b18c93c93416ef112ed70c65d69cc6bd Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 8 Aug 2022 02:51:20 +0000
+Subject: pinctrl: rockchip: Enhance support for IRQ_TYPE_EDGE_BOTH
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: João H. Spies <jhlspies@gmail.com>
+
+[ Upstream commit b871656aa4f54e04207f62bdd0d7572be1d86b36 ]
+
+Switching between falling/rising edges for IRQ_TYPE_EDGE_BOTH on pins that
+require debounce can cause the device to lose events due to a desync
+between pin state and irq type.
+
+This problem is resolved by switching between IRQ_TYPE_LEVEL_LOW and
+IRQ_TYPE_LEVEL_HIGH instead.
+
+Fixes: 936ee2675eee ("gpio/rockchip: add driver for rockchip gpio")
+Signed-off-by: João H. Spies <jhlspies@gmail.com>
+Link: https://lore.kernel.org/r/20220808025121.110223-1-jhlspies@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpio/gpio-rockchip.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
+index e342a6dc4c6c..bb953f647864 100644
+--- a/drivers/gpio/gpio-rockchip.c
++++ b/drivers/gpio/gpio-rockchip.c
+@@ -418,11 +418,11 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
+ goto out;
+ } else {
+ bank->toggle_edge_mode |= mask;
+- level |= mask;
++ level &= ~mask;
+
+ /*
+ * Determine gpio state. If 1 next interrupt should be
+- * falling otherwise rising.
++ * low otherwise high.
+ */
+ data = readl(bank->reg_base + bank->gpio_regs->ext_port);
+ if (data & mask)
+--
+2.35.1
+
--- /dev/null
+From bc56442446b8df6c64b7970558f8a67dc9d50e5d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 19 Aug 2022 10:45:41 +0800
+Subject: pinctrl: sunxi: Fix name for A100 R_PIO
+
+From: Michael Wu <michael@allwinnertech.com>
+
+[ Upstream commit 76648c867c6c03b8a468d9c9222025873ecc613d ]
+
+The name of A100 R_PIO driver should be sun50i-a100-r-pinctrl,
+not sun50iw10p1-r-pinctrl.
+
+Fixes: 473436e7647d6 ("pinctrl: sunxi: add support for the Allwinner A100 pin controller")
+Signed-off-by: Michael Wu <michael@allwinnertech.com>
+Acked-by: Samuel Holland <samuel@sholland.org>
+Link: https://lore.kernel.org/r/20220819024541.74191-1-michael@allwinnertech.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c
+index 21054fcacd34..18088f6f44b2 100644
+--- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c
++++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c
+@@ -98,7 +98,7 @@ MODULE_DEVICE_TABLE(of, a100_r_pinctrl_match);
+ static struct platform_driver a100_r_pinctrl_driver = {
+ .probe = a100_r_pinctrl_probe,
+ .driver = {
+- .name = "sun50iw10p1-r-pinctrl",
++ .name = "sun50i-a100-r-pinctrl",
+ .of_match_table = a100_r_pinctrl_match,
+ },
+ };
+--
+2.35.1
+
--- /dev/null
+From 93003412bd5e65279452413ebd66afc91837eb34 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 8 Sep 2022 17:08:51 +0300
+Subject: Revert "SUNRPC: Remove unreachable error condition"
+
+From: Dan Aloni <dan.aloni@vastdata.com>
+
+[ Upstream commit 13bd9014180425f5a35eaf3735971d582c299292 ]
+
+This reverts commit efe57fd58e1cb77f9186152ee12a8aa4ae3348e0.
+
+The assumption that it is impossible to return an ERR pointer from
+rpc_run_task() no longer holds due to commit 25cf32ad5dba ("SUNRPC:
+Handle allocation failure in rpc_new_task()").
+
+Fixes: 25cf32ad5dba ('SUNRPC: Handle allocation failure in rpc_new_task()')
+Fixes: efe57fd58e1c ('SUNRPC: Remove unreachable error condition')
+Signed-off-by: Dan Aloni <dan.aloni@vastdata.com>
+Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ net/sunrpc/clnt.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/net/sunrpc/clnt.c b/net/sunrpc/clnt.c
+index c1a01947530f..db8c0de1de42 100644
+--- a/net/sunrpc/clnt.c
++++ b/net/sunrpc/clnt.c
+@@ -2858,6 +2858,9 @@ int rpc_clnt_test_and_add_xprt(struct rpc_clnt *clnt,
+
+ task = rpc_call_null_helper(clnt, xprt, NULL, RPC_TASK_ASYNC,
+ &rpc_cb_add_xprt_call_ops, data);
++ if (IS_ERR(task))
++ return PTR_ERR(task);
++
+ data->xps->xps_nunique_destaddr_xprts++;
+ rpc_put_task(task);
+ success:
+--
+2.35.1
+
gpio-104-idio-16-make-irq_chip-immutable.patch
rdma-irdma-use-s-g-array-in-post-send-only-when-its-valid.patch
input-goodix-add-compatible-string-for-gt1158.patch
+of-fdt-fix-off-by-one-error-in-unflatten_dt_nodes.patch
+pinctrl-qcom-sc8180x-fix-gpio_wakeirq_map.patch
+pinctrl-qcom-sc8180x-fix-wrong-pin-numbers.patch
+pinctrl-rockchip-enhance-support-for-irq_type_edge_b.patch
+pinctrl-sunxi-fix-name-for-a100-r_pio.patch
+sunrpc-fix-call-completion-races-with-call_decode.patch
+nfsv4-turn-off-open-by-filehandle-and-nfs-re-export-.patch
+gpio-mpc8xxx-fix-support-for-irq_type_level_low-flow.patch
+nfsv4.2-update-mode-bits-after-allocate-and-dealloca.patch
+revert-sunrpc-remove-unreachable-error-condition.patch
+drm-panel-edp-fix-delays-for-innolux-n116bca-ea1.patch
+drm-meson-correct-osd1-global-alpha-value.patch
+drm-meson-fix-osd1-rgb-to-ycbcr-coefficient.patch
+drm-rockchip-vop2-fix-edp-hdmi-sync-polarities.patch
+drm-i915-vdsc-set-vdsc-pic_height-before-using-for-d.patch
+drm-i915-guc-don-t-update-engine-busyness-stats-too-.patch
+drm-i915-guc-cancel-guc-engine-busyness-worker-synch.patch
+block-blk_queue_enter-__bio_queue_enter-must-return-.patch
--- /dev/null
+From 771541e4cc6fe10a738572a23cc55c4a50827dea Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 31 Aug 2022 17:28:13 -0400
+Subject: SUNRPC: Fix call completion races with call_decode()
+
+From: Trond Myklebust <trond.myklebust@hammerspace.com>
+
+[ Upstream commit 17814819ac9829a437e06fbb5c7056a1f4f893da ]
+
+We need to make sure that the req->rq_private_buf is completely up to
+date before we make req->rq_reply_bytes_recvd visible to the
+call_decode() routine in order to avoid triggering the WARN_ON().
+
+Reported-by: Benjamin Coddington <bcodding@redhat.com>
+Fixes: 72691a269f0b ("SUNRPC: Don't reuse bvec on retransmission of the request")
+Tested-by: Benjamin Coddington <bcodding@redhat.com>
+Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ net/sunrpc/xprt.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/net/sunrpc/xprt.c b/net/sunrpc/xprt.c
+index 53b024cea3b3..5ecafffe7ce5 100644
+--- a/net/sunrpc/xprt.c
++++ b/net/sunrpc/xprt.c
+@@ -1179,11 +1179,8 @@ xprt_request_dequeue_receive_locked(struct rpc_task *task)
+ {
+ struct rpc_rqst *req = task->tk_rqstp;
+
+- if (test_and_clear_bit(RPC_TASK_NEED_RECV, &task->tk_runstate)) {
++ if (test_and_clear_bit(RPC_TASK_NEED_RECV, &task->tk_runstate))
+ xprt_request_rb_remove(req->rq_xprt, req);
+- xdr_free_bvec(&req->rq_rcv_buf);
+- req->rq_private_buf.bvec = NULL;
+- }
+ }
+
+ /**
+@@ -1221,6 +1218,8 @@ void xprt_complete_rqst(struct rpc_task *task, int copied)
+
+ xprt->stat.recvs++;
+
++ xdr_free_bvec(&req->rq_rcv_buf);
++ req->rq_private_buf.bvec = NULL;
+ req->rq_private_buf.len = copied;
+ /* Ensure all writes are done before we update */
+ /* req->rq_reply_bytes_recvd */
+@@ -1453,6 +1452,7 @@ xprt_request_dequeue_xprt(struct rpc_task *task)
+ xprt_request_dequeue_transmit_locked(task);
+ xprt_request_dequeue_receive_locked(task);
+ spin_unlock(&xprt->queue_lock);
++ xdr_free_bvec(&req->rq_rcv_buf);
+ }
+ }
+
+--
+2.35.1
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
