]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: update the handle ptr in post_soft_reset
authorSunil Khatri <sunil.khatri@amd.com>
Mon, 30 Sep 2024 09:38:44 +0000 (15:08 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 1 Oct 2024 21:45:51 +0000 (17:45 -0400)
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of post_soft_reset.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/tonga_ih.c
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/include/amd_shared.h

index 041eef115b215f371320d96c125c984c648f4faf..22f1af36317df91f787b1f9887b13bb3e8303211 100644 (file)
@@ -5070,7 +5070,7 @@ static int amdgpu_device_ip_post_soft_reset(struct amdgpu_device *adev)
                        continue;
                if (adev->ip_blocks[i].status.hang &&
                    adev->ip_blocks[i].version->funcs->post_soft_reset)
-                       r = adev->ip_blocks[i].version->funcs->post_soft_reset(adev);
+                       r = adev->ip_blocks[i].version->funcs->post_soft_reset(&adev->ip_blocks[i]);
                if (r)
                        return r;
        }
index ebf783763ac59900b2845cc2ee84586bfd8f4022..a0f80cc993cf4461f2a771991926f27ca73896a7 100644 (file)
@@ -4931,12 +4931,13 @@ static bool gfx_v11_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        return false;
 }
 
-static int gfx_v11_0_post_soft_reset(void *handle)
+static int gfx_v11_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
+       struct amdgpu_device *adev = ip_block->adev;
        /**
         * GFX soft reset will impact MES, need resume MES when do GFX soft reset
         */
-       return amdgpu_mes_resume((struct amdgpu_device *)handle);
+       return amdgpu_mes_resume(adev);
 }
 
 static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
index 0b72dc3062b59fe85bb48715c520483536ba89c2..6864219987e97a3b1c347de3e62168c1e19f5ffd 100644 (file)
@@ -5086,9 +5086,9 @@ static int gfx_v8_0_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gfx_v8_0_post_soft_reset(void *handle)
+static int gfx_v8_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        u32 grbm_soft_reset = 0;
 
        if ((!adev->gfx.grbm_soft_reset) &&
index 7ffb33dd54ef545dc52557cfd30857c73a31ecd0..47ba4480b7575c58d4a0a527e39381914959c64c 100644 (file)
@@ -1361,9 +1361,9 @@ static int gmc_v8_0_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gmc_v8_0_post_soft_reset(void *handle)
+static int gmc_v8_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->gmc.srbm_soft_reset)
                return 0;
index 3e702853e0ac94639d0aab58100e6424d6f3756b..18bc1463238f7b1680856f1ed19efecc783b5b76 100644 (file)
@@ -1271,9 +1271,9 @@ static int sdma_v3_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int sdma_v3_0_post_soft_reset(void *handle)
+static int sdma_v3_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        u32 srbm_soft_reset = 0;
 
        if (!adev->sdma.srbm_soft_reset)
index 59f167166f83f523391a6d40946bbce46593d0c8..d76c528d08f1da882635fa5bd930b7263bc0821e 100644 (file)
@@ -415,9 +415,9 @@ static int tonga_ih_pre_soft_reset(struct amdgpu_ip_block *ip_block)
        return tonga_ih_hw_fini(adev);
 }
 
-static int tonga_ih_post_soft_reset(void *handle)
+static int tonga_ih_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->irq.srbm_soft_reset)
                return 0;
index 1046ab677ea73afcd1c85c130d13a49f3c7dba13..0c334d90e4f3838b8c568bd626c22c3b8bbb0168 100644 (file)
@@ -1226,9 +1226,9 @@ static int uvd_v6_0_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int uvd_v6_0_post_soft_reset(void *handle)
+static int uvd_v6_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->uvd.inst->srbm_soft_reset)
                return 0;
index d4342556c09c2b957583603f58242268fe3264a5..6c2acde977b89d5e255216a815fe2b98f14bb7b1 100644 (file)
@@ -1548,9 +1548,9 @@ static int uvd_v7_0_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int uvd_v7_0_post_soft_reset(void *handle)
+static int uvd_v7_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->uvd.inst[ring->me].srbm_soft_reset)
                return 0;
index 34d7c2e4da8e9c10f0fe73a009567046987c7cca..92ffd3fa5b0012ca34d0ff8bb091b4c371907dda 100644 (file)
@@ -712,9 +712,9 @@ static int vce_v3_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 }
 
 
-static int vce_v3_0_post_soft_reset(void *handle)
+static int vce_v3_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->vce.srbm_soft_reset)
                return 0;
index b5399ecb6bb2c72361b054fc05e83731602409c9..b17aabaf220ad8e3ceaa9d524fcb71c3584c407e 100644 (file)
@@ -806,9 +806,9 @@ static int vce_v4_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 }
 
 
-static int vce_v4_0_post_soft_reset(void *handle)
+static int vce_v4_0_post_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->vce.srbm_soft_reset)
                return 0;
index 97a1726cd96859f61b6a26c0a3b7d93f98aec736..6601d3e0f5dd8ea14d2affa0a79362d2ada84178 100644 (file)
@@ -395,7 +395,7 @@ struct amd_ip_funcs {
        bool (*check_soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*pre_soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*soft_reset)(struct amdgpu_ip_block *ip_block);
-       int (*post_soft_reset)(void *handle);
+       int (*post_soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*set_clockgating_state)(void *handle,
                                     enum amd_clockgating_state state);
        int (*set_powergating_state)(void *handle,