--- /dev/null
+From f7f3dd5b4cbb138ed4559b0d096bab76a8f476de Mon Sep 17 00:00:00 2001
+From: Hanjun Guo <hanjun.guo@linaro.org>
+Date: Fri, 28 Jul 2017 17:42:35 +0800
+Subject: ACPI: APD: Fix HID for Hisilicon Hip07/08
+
+From: Hanjun Guo <hanjun.guo@linaro.org>
+
+commit f7f3dd5b4cbb138ed4559b0d096bab76a8f476de upstream.
+
+ACPI HID for Hisilicon Hip07/08 should be HISI02A1/2,
+not HISI0A21/2, HISI02A1/2 was tested ok but was modified
+by the stupid typo when upstream the patches (by me),
+correct them to the right IDs (matching the IDs in
+drivers/i2c/busses/i2c-designware-platdrv.c).
+
+Fixes: 6e14cf361a0c (ACPI / APD: Add clock frequency for Hisilicon Hip07/08 I2C controller)
+Reported-by: Tao Tian <tiantao6@huawei.com>
+Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/acpi/acpi_apd.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/acpi/acpi_apd.c
++++ b/drivers/acpi/acpi_apd.c
+@@ -180,8 +180,8 @@ static const struct acpi_device_id acpi_
+ { "APMC0D0F", APD_ADDR(xgene_i2c_desc) },
+ { "BRCM900D", APD_ADDR(vulcan_spi_desc) },
+ { "CAV900D", APD_ADDR(vulcan_spi_desc) },
+- { "HISI0A21", APD_ADDR(hip07_i2c_desc) },
+- { "HISI0A22", APD_ADDR(hip08_i2c_desc) },
++ { "HISI02A1", APD_ADDR(hip07_i2c_desc) },
++ { "HISI02A2", APD_ADDR(hip08_i2c_desc) },
+ #endif
+ { }
+ };
--- /dev/null
+From 98529b9272e06a7767034fb8a32e43cdecda240a Mon Sep 17 00:00:00 2001
+From: Lv Zheng <lv.zheng@intel.com>
+Date: Wed, 16 Aug 2017 15:29:49 +0800
+Subject: ACPI: EC: Fix regression related to wrong ECDT initialization order
+
+From: Lv Zheng <lv.zheng@intel.com>
+
+commit 98529b9272e06a7767034fb8a32e43cdecda240a upstream.
+
+Commit 2a5708409e4e (ACPI / EC: Fix a gap that ECDT EC cannot handle
+EC events) introduced acpi_ec_ecdt_start(), but that function is
+invoked before acpi_ec_query_init(), which is too early. This causes
+the kernel to crash if an EC event occurs after boot, when ec_query_wq
+is not valid:
+
+ BUG: unable to handle kernel NULL pointer dereference at 0000000000000102
+ ...
+ Workqueue: events acpi_ec_event_handler
+ task: ffff9f539790dac0 task.stack: ffffb437c0e10000
+ RIP: 0010:__queue_work+0x32/0x430
+
+Normally, the DSDT EC should always be valid, so acpi_ec_ecdt_start()
+is actually a no-op in the majority of cases. However, commit
+c712bb58d827 (ACPI / EC: Add support to skip boot stage DSDT probe)
+caused the probing of the DSDT EC as the "boot EC" to be skipped when
+the ECDT EC is valid and uncovered the bug.
+
+Fix this issue by invoking acpi_ec_ecdt_start() after acpi_ec_query_init()
+in acpi_ec_init().
+
+Link: https://jira01.devtools.intel.com/browse/LCK-4348
+Fixes: 2a5708409e4e (ACPI / EC: Fix a gap that ECDT EC cannot handle EC events)
+Fixes: c712bb58d827 (ACPI / EC: Add support to skip boot stage DSDT probe)
+Reported-by: Wang Wendy <wendy.wang@intel.com>
+Tested-by: Feng Chenzhou <chenzhoux.feng@intel.com>
+Signed-off-by: Lv Zheng <lv.zheng@intel.com>
+[ rjw: Changelog ]
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/acpi/ec.c | 17 +++++++----------
+ drivers/acpi/internal.h | 1 -
+ drivers/acpi/scan.c | 1 -
+ 3 files changed, 7 insertions(+), 12 deletions(-)
+
+--- a/drivers/acpi/ec.c
++++ b/drivers/acpi/ec.c
+@@ -1703,7 +1703,7 @@ error:
+ * functioning ECDT EC first in order to handle the events.
+ * https://bugzilla.kernel.org/show_bug.cgi?id=115021
+ */
+-int __init acpi_ec_ecdt_start(void)
++static int __init acpi_ec_ecdt_start(void)
+ {
+ acpi_handle handle;
+
+@@ -1906,20 +1906,17 @@ static inline void acpi_ec_query_exit(vo
+ int __init acpi_ec_init(void)
+ {
+ int result;
++ int ecdt_fail, dsdt_fail;
+
+ /* register workqueue for _Qxx evaluations */
+ result = acpi_ec_query_init();
+ if (result)
+- goto err_exit;
+- /* Now register the driver for the EC */
+- result = acpi_bus_register_driver(&acpi_ec_driver);
+- if (result)
+- goto err_exit;
++ return result;
+
+-err_exit:
+- if (result)
+- acpi_ec_query_exit();
+- return result;
++ /* Drivers must be started after acpi_ec_query_init() */
++ ecdt_fail = acpi_ec_ecdt_start();
++ dsdt_fail = acpi_bus_register_driver(&acpi_ec_driver);
++ return ecdt_fail && dsdt_fail ? -ENODEV : 0;
+ }
+
+ /* EC driver currently not unloadable */
+--- a/drivers/acpi/internal.h
++++ b/drivers/acpi/internal.h
+@@ -185,7 +185,6 @@ typedef int (*acpi_ec_query_func) (void
+ int acpi_ec_init(void);
+ int acpi_ec_ecdt_probe(void);
+ int acpi_ec_dsdt_probe(void);
+-int acpi_ec_ecdt_start(void);
+ void acpi_ec_block_transactions(void);
+ void acpi_ec_unblock_transactions(void);
+ int acpi_ec_add_query_handler(struct acpi_ec *ec, u8 query_bit,
+--- a/drivers/acpi/scan.c
++++ b/drivers/acpi/scan.c
+@@ -2085,7 +2085,6 @@ int __init acpi_scan_init(void)
+
+ acpi_gpe_apply_masked_gpes();
+ acpi_update_all_gpes();
+- acpi_ec_ecdt_start();
+
+ acpi_scan_initialized = true;
+
--- /dev/null
+From 0eb46345364d7318b11068c46e8a68d5dc10f65e Mon Sep 17 00:00:00 2001
+From: Logan Gunthorpe <logang@deltatee.com>
+Date: Tue, 25 Jul 2017 14:57:42 -0600
+Subject: ntb: ntb_test: ensure the link is up before trying to configure the mws
+
+From: Logan Gunthorpe <logang@deltatee.com>
+
+commit 0eb46345364d7318b11068c46e8a68d5dc10f65e upstream.
+
+After the link tests, there is a race on one side of the test for
+the link coming up. It's possible, in some cases, for the test script
+to write to the 'peer_trans' files before the link has come up.
+
+To fix this, we simply use the link event file to ensure both sides
+see the link as up before continuning.
+
+Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
+Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
+Signed-off-by: Jon Mason <jdmason@kudzu.us>
+Fixes: a9c59ef77458 ("ntb_test: Add a selftest script for the NTB subsystem")
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ tools/testing/selftests/ntb/ntb_test.sh | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/tools/testing/selftests/ntb/ntb_test.sh
++++ b/tools/testing/selftests/ntb/ntb_test.sh
+@@ -326,6 +326,10 @@ function ntb_tool_tests()
+ link_test $LOCAL_TOOL $REMOTE_TOOL
+ link_test $REMOTE_TOOL $LOCAL_TOOL
+
++ #Ensure the link is up on both sides before continuing
++ write_file Y $LOCAL_TOOL/link_event
++ write_file Y $REMOTE_TOOL/link_event
++
+ for PEER_TRANS in $(ls $LOCAL_TOOL/peer_trans*); do
+ PT=$(basename $PEER_TRANS)
+ write_file $MW_SIZE $LOCAL_TOOL/$PT
--- /dev/null
+From f3fd2afed8eee91620d05b69ab94c14793c849d7 Mon Sep 17 00:00:00 2001
+From: Dave Jiang <dave.jiang@intel.com>
+Date: Fri, 28 Jul 2017 15:10:48 -0700
+Subject: ntb: transport shouldn't disable link due to bogus values in SPADs
+
+From: Dave Jiang <dave.jiang@intel.com>
+
+commit f3fd2afed8eee91620d05b69ab94c14793c849d7 upstream.
+
+It seems that under certain scenarios the SPAD can have bogus values caused
+by an agent (i.e. BIOS or other software) that is not the kernel driver, and
+that causes memory window setup failure. This should not cause the link to
+be disabled because if we do that, the driver will never recover again. We
+have verified in testing that this issue happens and prevents proper link
+recovery.
+
+Signed-off-by: Dave Jiang <dave.jiang@intel.com>
+Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
+Signed-off-by: Jon Mason <jdmason@kudzu.us>
+Fixes: 84f766855f61 ("ntb: stop link work when we do not have memory")
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ntb/ntb_transport.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+--- a/drivers/ntb/ntb_transport.c
++++ b/drivers/ntb/ntb_transport.c
+@@ -920,10 +920,8 @@ out1:
+ ntb_free_mw(nt, i);
+
+ /* if there's an actual failure, we should just bail */
+- if (rc < 0) {
+- ntb_link_disable(ndev);
++ if (rc < 0)
+ return;
+- }
+
+ out:
+ if (ntb_link_is_up(ndev, NULL, NULL) == 1)
--- /dev/null
+From 1a92a80ad386a1a6e3b36d576d52a1a456394b70 Mon Sep 17 00:00:00 2001
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Date: Mon, 24 Jul 2017 14:28:00 +1000
+Subject: powerpc/mm: Ensure cpumask update is ordered
+
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+
+commit 1a92a80ad386a1a6e3b36d576d52a1a456394b70 upstream.
+
+There is no guarantee that the various isync's involved with
+the context switch will order the update of the CPU mask with
+the first TLB entry for the new context being loaded by the HW.
+
+Be safe here and add a memory barrier to order any subsequent
+load/store which may bring entries into the TLB.
+
+The corresponding barrier on the other side already exists as
+pte updates use pte_xchg() which uses __cmpxchg_u64 which has
+a sync after the atomic operation.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
+[mpe: Add comments in the code]
+[mpe: Backport to 4.12, minor context change]
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/include/asm/mmu_context.h | 20 +++++++++++++++++++-
+ arch/powerpc/include/asm/pgtable-be-types.h | 1 +
+ arch/powerpc/include/asm/pgtable-types.h | 1 +
+ 3 files changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/powerpc/include/asm/mmu_context.h
++++ b/arch/powerpc/include/asm/mmu_context.h
+@@ -80,9 +80,27 @@ static inline void switch_mm_irqs_off(st
+ struct task_struct *tsk)
+ {
+ /* Mark this context has been used on the new CPU */
+- if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next)))
++ if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) {
+ cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
+
++ /*
++ * This full barrier orders the store to the cpumask above vs
++ * a subsequent operation which allows this CPU to begin loading
++ * translations for next.
++ *
++ * When using the radix MMU that operation is the load of the
++ * MMU context id, which is then moved to SPRN_PID.
++ *
++ * For the hash MMU it is either the first load from slb_cache
++ * in switch_slb(), and/or the store of paca->mm_ctx_id in
++ * copy_mm_to_paca().
++ *
++ * On the read side the barrier is in pte_xchg(), which orders
++ * the store to the PTE vs the load of mm_cpumask.
++ */
++ smp_mb();
++ }
++
+ /* 32-bit keeps track of the current PGDIR in the thread struct */
+ #ifdef CONFIG_PPC32
+ tsk->thread.pgdir = next->pgd;
+--- a/arch/powerpc/include/asm/pgtable-be-types.h
++++ b/arch/powerpc/include/asm/pgtable-be-types.h
+@@ -87,6 +87,7 @@ static inline bool pte_xchg(pte_t *ptep,
+ unsigned long *p = (unsigned long *)ptep;
+ __be64 prev;
+
++ /* See comment in switch_mm_irqs_off() */
+ prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old),
+ (__force unsigned long)pte_raw(new));
+
+--- a/arch/powerpc/include/asm/pgtable-types.h
++++ b/arch/powerpc/include/asm/pgtable-types.h
+@@ -62,6 +62,7 @@ static inline bool pte_xchg(pte_t *ptep,
+ {
+ unsigned long *p = (unsigned long *)ptep;
+
++ /* See comment in switch_mm_irqs_off() */
+ return pte_val(old) == __cmpxchg_u64(p, pte_val(old), pte_val(new));
+ }
+ #endif
staging-rtl8188eu-add-rnx-n150nub-support.patch
iommu-fix-wrong-freeing-of-iommu_device-dev.patch
clarify-and-fix-max_lfs_filesize-macros.patch
+ntb-ntb_test-ensure-the-link-is-up-before-trying-to-configure-the-mws.patch
+ntb-transport-shouldn-t-disable-link-due-to-bogus-values-in-spads.patch
+acpi-apd-fix-hid-for-hisilicon-hip07-08.patch
+acpi-ec-fix-regression-related-to-wrong-ecdt-initialization-order.patch
+powerpc-mm-ensure-cpumask-update-is-ordered.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
