regtest arm64: fixes for arm64 clang, part 4

clang assembler being picky about unneeded annotations such as
LSL #0 but then insisting on a .0 that gas infers.

diff --git a/none/tests/arm64/fp_and_simd.c b/none/tests/arm64/fp_and_simd.c
index 2379e15c7ff8c481cf7f5613f370187d94a0a75d..55964442a51b74bd7fdb151a970f015174369205 100644 (file)
--- a/none/tests/arm64/fp_and_simd.c
+++ b/none/tests/arm64/fp_and_simd.c
@@ -1909,7 +1909,7 @@ void test_SMAXV ( void )
      __asm__ __volatile__( \
         "ldr x9,  [%0, 48];  msr nzcv, x9; " \
         "ldr q29, [%0, #0];  ldr q11, [%0, #16];  ldr q9, [%0, #32]; " \
-        "fcmp d29, #0; " \
+        "fcmp d29, #0.0; " \
         "mrs x9, nzcv; str x9, [%0, 48]; " \
         "str q29, [%0, #0];  str q11, [%0, #16];  str q9, [%0, #32]; " \
         ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
@@ -1930,7 +1930,7 @@ void test_SMAXV ( void )
      __asm__ __volatile__( \
         "ldr x9,  [%0, 48];  msr nzcv, x9; " \
         "ldr q29, [%0, #0];  ldr q11, [%0, #16];  ldr q9, [%0, #32]; " \
-        "fcmp s29, #0; " \
+        "fcmp s29, #0.0; " \
         "mrs x9, nzcv; str x9, [%0, 48]; " \
         "str q29, [%0, #0];  str q11, [%0, #16];  str q9, [%0, #32]; " \
         ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
@@ -1951,7 +1951,7 @@ void test_SMAXV ( void )
      __asm__ __volatile__( \
         "ldr x9,  [%0, 48];  msr nzcv, x9; " \
         "ldr q29, [%0, #0];  ldr q11, [%0, #16];  ldr q9, [%0, #32]; " \
-        "fcmpe d29, #0; " \
+        "fcmpe d29, #0.0; " \
         "mrs x9, nzcv; str x9, [%0, 48]; " \
         "str q29, [%0, #0];  str q11, [%0, #16];  str q9, [%0, #32]; " \
         ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
@@ -1972,7 +1972,7 @@ void test_SMAXV ( void )
      __asm__ __volatile__( \
         "ldr x9,  [%0, 48];  msr nzcv, x9; " \
         "ldr q29, [%0, #0];  ldr q11, [%0, #16];  ldr q9, [%0, #32]; " \
-        "fcmpe s29, #0; " \
+        "fcmpe s29, #0.0; " \
         "mrs x9, nzcv; str x9, [%0, 48]; " \
         "str q29, [%0, #0];  str q11, [%0, #16];  str q9, [%0, #32]; " \
         ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
@@ -3054,8 +3054,8 @@ GEN_BINARY_TEST(mul, 16b, 16b, 16b)
 GEN_BINARY_TEST(mul, 8b, 8b, 8b)
 
 /* overkill -- don't need two vecs, only one */
-GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C, LSL #0", 22, 23)
-GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0,  "movi v22.8b,  #0x8B, LSL #0", 22, 23)
+GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C", 22, 23)
+GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0,  "movi v22.8b,  #0x8B", 22, 23)
 
 GEN_TWOVEC_TEST(movi_8h_0x5A_lsl0,  "movi v22.8h,  #0x5A, LSL #0", 22, 23)
 GEN_TWOVEC_TEST(movi_8h_0xA5_lsl8,  "movi v22.8h,  #0xA5, LSL #8", 22, 23)

diff --git a/none/tests/arm64/fp_and_simd.stdout.exp b/none/tests/arm64/fp_and_simd.stdout.exp
index c1ee8dfb1fa8a3535ecb8ce8e288d2bbaffe159b..7d5ae31e6c7dce162a060096e37c3a9b754a9e73 100644 (file)
--- a/none/tests/arm64/fp_and_simd.stdout.exp
+++ b/none/tests/arm64/fp_and_simd.stdout.exp
@@ -27254,8 +27254,8 @@ mul v9.8h, v7.8h, v8.8h  f6af445da7b3cc9be9f340d8c4ab9c27  bd95d0e8a65fc385c0984
 mul v9.4h, v7.4h, v8.4h  35a81626c9754edff07d4ac39d6423d7  f955eb7fcf6e4d85fa5df158fd7f3bdf  00000000000000006f694608e89cc549 fpsr=00000000
 mul v9.16b, v7.16b, v8.16b  92420bd9ceb098e08615b54e389f3c35  b941b1c1eac88f0bfacccdb7d693701c  82c29b994c80e8a0dcbcf1c2d04d40cc fpsr=00000000
 mul v9.8b, v7.8b, v8.8b  6e3c002b5e299eac9ef8b13327f77ea4  a9573196808a2e93e35c8909b9b530a0  00000000000000001a20b9cb2fa3a080 fpsr=00000000
-movi v22.16b, #0x9C, LSL #0   e807141cf52befdf29d2cadb2877c9a0  7e9a625eac790bfc5e036f1e08aa3b7c  9c9c9c9c9c9c9c9c9c9c9c9c9c9c9c9c  7e9a625eac790bfc5e036f1e08aa3b7c fpsr=00000000
-movi v22.8b,  #0x8B, LSL #0   6d9c3e6cf017afd55687ae5d3c0948e8  213e905417803eaf26184cef3a98d29a  00000000000000008b8b8b8b8b8b8b8b  213e905417803eaf26184cef3a98d29a fpsr=00000000
+movi v22.16b, #0x9C   e807141cf52befdf29d2cadb2877c9a0  7e9a625eac790bfc5e036f1e08aa3b7c  9c9c9c9c9c9c9c9c9c9c9c9c9c9c9c9c  7e9a625eac790bfc5e036f1e08aa3b7c fpsr=00000000
+movi v22.8b,  #0x8B   6d9c3e6cf017afd55687ae5d3c0948e8  213e905417803eaf26184cef3a98d29a  00000000000000008b8b8b8b8b8b8b8b  213e905417803eaf26184cef3a98d29a fpsr=00000000
 movi v22.8h,  #0x5A, LSL #0   4d5ebd2650223e56522e3b6dea3eaaa0  b706ebebff1e98a75415aa861da1a3e1  005a005a005a005a005a005a005a005a  b706ebebff1e98a75415aa861da1a3e1 fpsr=00000000
 movi v22.8h,  #0xA5, LSL #8   e92df029752cfc447da5d0ec92f64fa7  a1d3d204c53377c24adbe8c212a50f30  a500a500a500a500a500a500a500a500  a1d3d204c53377c24adbe8c212a50f30 fpsr=00000000
 movi v22.4h,  #0x5A, LSL #0   a0e93757c015477d37cdceb8921195df  3e85a57fc89e3ee2684b678578837666  0000000000000000005a005a005a005a  3e85a57fc89e3ee2684b678578837666 fpsr=00000000