+2009-04-10 Ben Elliston <bje@au.ibm.com>
+
+ PR target/36800
+ * config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Do not set
+ regalign for the reg == fpr and TDmode case.
+
2009-04-09 David Ayers <ayers@fsfe.org>
PR objc/29200
reg number is 0 for f1, so we want to make it odd. */
else if (reg == fpr && TYPE_MODE (type) == TDmode)
{
- regalign = 1;
t = build2 (BIT_IOR_EXPR, TREE_TYPE (reg), unshare_expr (reg),
build_int_cst (TREE_TYPE (reg), 1));
u = build2 (MODIFY_EXPR, void_type_node, unshare_expr (reg), t);
+2009-04-10 Ben Elliston <bje@au.ibm.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ PR target/36800
+ * gcc.dg/dfp/pr36800.c: New.
+
2009-04-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
Rafael Avila de Espindola <espindola@google.com>
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-std=gnu99" } */
+
+#include <stdarg.h>
+extern void abort (void);
+
+void
+f (int a, ...)
+{
+ va_list ap;
+ if (a != 0)
+ abort ();
+ va_start (ap, a);
+ if (va_arg (ap, _Decimal128) != 1.2DL)
+ abort ();
+ if (va_arg (ap, _Decimal128) != 2.34DL)
+ abort ();
+ if (va_arg (ap, _Decimal128) != 3.456DL)
+ abort ();
+ if (va_arg (ap, _Decimal128) != 4.567DL)
+ abort ();
+ if (va_arg (ap, double) != 5.125)
+ abort ();
+ va_end (ap);
+}
+
+int
+main (void)
+{
+ f (0, 1.2DL, 2.34DL, 3.456DL, 4.567DL, 5.125);
+ return 0;
+}