clk: renesas: r9a08g045: Add power domain for RTC

The RTC and VBATTB don't share the MSTOP control bit (but only the bus
clock and the reset signal). As the MSTOP control is modeled though power
domains add power domain support for the RTC device available on the
Renesas RZ/G3S SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241019084738.3370489-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c
index f5f454832bb53fe8436fc1906d2024bec10cf30a..b2ae8cdc4723e6d8328d7f18cf27c0534e21061e 100644 (file)
--- a/drivers/clk/renesas/r9a08g045-cpg.c
+++ b/drivers/clk/renesas/r9a08g045-cpg.c
@@ -309,6 +309,8 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = {
        DEF_PD("vbat",          R9A08G045_PD_VBAT,
                                DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(8)),
                                GENPD_FLAG_ALWAYS_ON),
+       DEF_PD("rtc",           R9A08G045_PD_RTC,
+                               DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(7)), 0),
 };
 
 const struct rzg2l_cpg_info r9a08g045_cpg_info = {