drm/i915: Set clear color block size to 0x0

We don't use the block size information for the clear color
plane. Technically the entire fb is the single block for the
single 64B clear color surface, so there is just no way to
delcare that as a constant since the fb size can be anything.

Define the clear color block size as 0x0 to make things less
confusing. We already declared that cpp/chars_per_block=0 for
the clear color as well. That also causes the drm core code
to mostly ignore the clear color plane, which is exactly
what we want since that code doesn't know how to deal with
the clear color plane.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240918144445.5716-2-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index c03060e5e503a5608a656744af3fed3bedd4010e..6c2679e6c9808dc1f2f581c4d58369187991a392 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -102,31 +102,31 @@ static const struct drm_format_info gen12_ccs_formats[] = {
  */
 static const struct drm_format_info gen12_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 3,
-         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, },
        { .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 3,
-         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, },
        { .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 3,
-         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
        { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 3,
-         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 2 }, .block_h = { 1, 1, 1 },
+         .char_per_block = { 4, 1, 0 }, .block_w = { 1, 2, 0 }, .block_h = { 1, 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
 };
 
 static const struct drm_format_info gen12_flat_ccs_cc_formats[] = {
        { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 2,
-         .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, },
        { .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 2,
-         .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, },
        { .format = DRM_FORMAT_ARGB8888, .depth = 32, .num_planes = 2,
-         .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
        { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
-         .char_per_block = { 4, 0 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
+         .char_per_block = { 4, 0 }, .block_w = { 1, 0 }, .block_h = { 1, 0 },
          .hsub = 1, .vsub = 1, .has_alpha = true },
 };