]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
tools: riscv: Fixed misalignment of CSR related definitions
authorChen Pei <cp0613@linux.alibaba.com>
Fri, 14 Nov 2025 07:12:15 +0000 (15:12 +0800)
committerPaul Walmsley <pjw@kernel.org>
Sun, 16 Nov 2025 17:37:38 +0000 (10:37 -0700)
The file tools/arch/riscv/include/asm/csr.h borrows from
arch/riscv/include/asm/csr.h, and subsequent modifications
related to CSR should maintain consistency.

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Link: https://patch.msgid.link/20251114071215.816-1-cp0613@linux.alibaba.com
[pjw@kernel.org: dropped Fixes: lines for patches that weren't broken; removed superfluous blank line]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
drivers/perf/riscv_pmu_sbi.c
tools/arch/riscv/include/asm/csr.h

index e255c1b069ec18d4a66aacf2f6c702c0a36083a6..7dd282da67cef95a178dbc644405aa79dbd181c4 100644 (file)
@@ -1109,7 +1109,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev)
                        /* compute hardware counter index */
                        hidx = info->csr - CSR_CYCLE;
 
-               /* check if the corresponding bit is set in sscountovf or overflow mask in shmem */
+               /* check if the corresponding bit is set in scountovf or overflow mask in shmem */
                if (!(overflow & BIT(hidx)))
                        continue;
 
index 56d7367ee344c16b8eacc073bc5d5efa6784f972..21d8cee046383df27b9f132865b8b702766d93bd 100644 (file)
 #define VSIP_TO_HVIP_SHIFT     (IRQ_VS_SOFT - IRQ_S_SOFT)
 #define VSIP_VALID_MASK                ((_AC(1, UL) << IRQ_S_SOFT) | \
                                 (_AC(1, UL) << IRQ_S_TIMER) | \
-                                (_AC(1, UL) << IRQ_S_EXT))
+                                (_AC(1, UL) << IRQ_S_EXT) | \
+                                (_AC(1, UL) << IRQ_PMU_OVF))
 
 /* AIA CSR bits */
 #define TOPI_IID_SHIFT         16
 #define CSR_HPMCOUNTER30H      0xc9e
 #define CSR_HPMCOUNTER31H      0xc9f
 
-#define CSR_SSCOUNTOVF         0xda0
+#define CSR_SCOUNTOVF          0xda0
 
 #define CSR_SSTATUS            0x100
 #define CSR_SIE                        0x104