]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.9-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 20 Mar 2017 12:31:54 +0000 (13:31 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 20 Mar 2017 12:31:54 +0000 (13:31 +0100)
added patches:
clk-bcm2835-fix-fixed_divider-of-pllh_aux.patch
drm-vc4-fix-clock_select-setting-for-the-vec-encoder.patch
drm-vc4-fix-race-between-page-flip-completion-event-and-clean-up.patch

queue-4.9/clk-bcm2835-fix-fixed_divider-of-pllh_aux.patch [new file with mode: 0644]
queue-4.9/drm-vc4-fix-clock_select-setting-for-the-vec-encoder.patch [new file with mode: 0644]
queue-4.9/drm-vc4-fix-race-between-page-flip-completion-event-and-clean-up.patch [new file with mode: 0644]
queue-4.9/series

diff --git a/queue-4.9/clk-bcm2835-fix-fixed_divider-of-pllh_aux.patch b/queue-4.9/clk-bcm2835-fix-fixed_divider-of-pllh_aux.patch
new file mode 100644 (file)
index 0000000..09fa56e
--- /dev/null
@@ -0,0 +1,33 @@
+From f2a46926aba1f0c33944901d2420a6a887455ddc Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+Date: Tue, 22 Nov 2016 12:45:28 -0800
+Subject: clk: bcm2835: Fix ->fixed_divider of pllh_aux
+
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+
+commit f2a46926aba1f0c33944901d2420a6a887455ddc upstream.
+
+There is no fixed divider on pllh_aux.
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Cc: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clk/bcm/clk-bcm2835.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1598,7 +1598,7 @@ static const struct bcm2835_clk_desc clk
+               .a2w_reg = A2W_PLLH_AUX,
+               .load_mask = CM_PLLH_LOADAUX,
+               .hold_mask = 0,
+-              .fixed_divider = 10),
++              .fixed_divider = 1),
+       [BCM2835_PLLH_PIX]      = REGISTER_PLL_DIV(
+               .name = "pllh_pix",
+               .source_pll = "pllh",
diff --git a/queue-4.9/drm-vc4-fix-clock_select-setting-for-the-vec-encoder.patch b/queue-4.9/drm-vc4-fix-clock_select-setting-for-the-vec-encoder.patch
new file mode 100644 (file)
index 0000000..0b68544
--- /dev/null
@@ -0,0 +1,120 @@
+From ab8df60e3a3b68420d0d4477c5f07c00fbfb078b Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+Date: Fri, 2 Dec 2016 14:48:07 +0100
+Subject: drm/vc4: Fix ->clock_select setting for the VEC encoder
+
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+
+commit ab8df60e3a3b68420d0d4477c5f07c00fbfb078b upstream.
+
+PV_CONTROL_CLK_SELECT_VEC is actually 2 and not 0. Fix the definition and
+rework the vc4_set_crtc_possible_masks() to cover the full range of the
+PV_CONTROL_CLK_SELECT field.
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Cc: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c |   36 ++++++++++++++++++++++--------------
+ drivers/gpu/drm/vc4/vc4_drv.h  |    1 +
+ drivers/gpu/drm/vc4/vc4_regs.h |    3 ++-
+ 3 files changed, 25 insertions(+), 15 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -83,8 +83,7 @@ struct vc4_crtc_data {
+       /* Which channel of the HVS this pixelvalve sources from. */
+       int hvs_channel;
+-      enum vc4_encoder_type encoder0_type;
+-      enum vc4_encoder_type encoder1_type;
++      enum vc4_encoder_type encoder_types[4];
+ };
+ #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset))
+@@ -867,20 +866,26 @@ static const struct drm_crtc_helper_func
+ static const struct vc4_crtc_data pv0_data = {
+       .hvs_channel = 0,
+-      .encoder0_type = VC4_ENCODER_TYPE_DSI0,
+-      .encoder1_type = VC4_ENCODER_TYPE_DPI,
++      .encoder_types = {
++              [PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI0,
++              [PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_DPI,
++      },
+ };
+ static const struct vc4_crtc_data pv1_data = {
+       .hvs_channel = 2,
+-      .encoder0_type = VC4_ENCODER_TYPE_DSI1,
+-      .encoder1_type = VC4_ENCODER_TYPE_SMI,
++      .encoder_types = {
++              [PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI1,
++              [PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_SMI,
++      },
+ };
+ static const struct vc4_crtc_data pv2_data = {
+       .hvs_channel = 1,
+-      .encoder0_type = VC4_ENCODER_TYPE_VEC,
+-      .encoder1_type = VC4_ENCODER_TYPE_HDMI,
++      .encoder_types = {
++              [PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_HDMI,
++              [PV_CONTROL_CLK_SELECT_VEC] = VC4_ENCODER_TYPE_VEC,
++      },
+ };
+ static const struct of_device_id vc4_crtc_dt_match[] = {
+@@ -894,17 +899,20 @@ static void vc4_set_crtc_possible_masks(
+                                       struct drm_crtc *crtc)
+ {
+       struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++      const struct vc4_crtc_data *crtc_data = vc4_crtc->data;
++      const enum vc4_encoder_type *encoder_types = crtc_data->encoder_types;
+       struct drm_encoder *encoder;
+       drm_for_each_encoder(encoder, drm) {
+               struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
++              int i;
+-              if (vc4_encoder->type == vc4_crtc->data->encoder0_type) {
+-                      vc4_encoder->clock_select = 0;
+-                      encoder->possible_crtcs |= drm_crtc_mask(crtc);
+-              } else if (vc4_encoder->type == vc4_crtc->data->encoder1_type) {
+-                      vc4_encoder->clock_select = 1;
+-                      encoder->possible_crtcs |= drm_crtc_mask(crtc);
++              for (i = 0; i < ARRAY_SIZE(crtc_data->encoder_types); i++) {
++                      if (vc4_encoder->type == encoder_types[i]) {
++                              vc4_encoder->clock_select = i;
++                              encoder->possible_crtcs |= drm_crtc_mask(crtc);
++                              break;
++                      }
+               }
+       }
+ }
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -194,6 +194,7 @@ to_vc4_plane(struct drm_plane *plane)
+ }
+ enum vc4_encoder_type {
++      VC4_ENCODER_TYPE_NONE,
+       VC4_ENCODER_TYPE_HDMI,
+       VC4_ENCODER_TYPE_VEC,
+       VC4_ENCODER_TYPE_DSI0,
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -177,8 +177,9 @@
+ # define PV_CONTROL_WAIT_HSTART                       BIT(12)
+ # define PV_CONTROL_PIXEL_REP_MASK            VC4_MASK(5, 4)
+ # define PV_CONTROL_PIXEL_REP_SHIFT           4
+-# define PV_CONTROL_CLK_SELECT_DSI_VEC                0
++# define PV_CONTROL_CLK_SELECT_DSI            0
+ # define PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI   1
++# define PV_CONTROL_CLK_SELECT_VEC            2
+ # define PV_CONTROL_CLK_SELECT_MASK           VC4_MASK(3, 2)
+ # define PV_CONTROL_CLK_SELECT_SHIFT          2
+ # define PV_CONTROL_FIFO_CLR                  BIT(1)
diff --git a/queue-4.9/drm-vc4-fix-race-between-page-flip-completion-event-and-clean-up.patch b/queue-4.9/drm-vc4-fix-race-between-page-flip-completion-event-and-clean-up.patch
new file mode 100644 (file)
index 0000000..e952abb
--- /dev/null
@@ -0,0 +1,98 @@
+From 26fc78f6fef39b9d7a15def5e7e9826ff68303f4 Mon Sep 17 00:00:00 2001
+From: Derek Foreman <derekf@osg.samsung.com>
+Date: Thu, 24 Nov 2016 12:11:55 -0600
+Subject: drm/vc4: Fix race between page flip completion event and clean-up
+
+From: Derek Foreman <derekf@osg.samsung.com>
+
+commit 26fc78f6fef39b9d7a15def5e7e9826ff68303f4 upstream.
+
+There was a small window where a userspace program could submit
+a pageflip after receiving a pageflip completion event yet still
+receive EBUSY.
+
+Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Daniel Stone <daniels@collabora.com>
+Cc: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c |    8 ++++++++
+ drivers/gpu/drm/vc4/vc4_drv.h  |    1 +
+ drivers/gpu/drm/vc4/vc4_kms.c  |   33 +++++++++++++++++++++++++--------
+ 3 files changed, 34 insertions(+), 8 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -669,6 +669,14 @@ void vc4_disable_vblank(struct drm_devic
+       CRTC_WRITE(PV_INTEN, 0);
+ }
++/* Must be called with the event lock held */
++bool vc4_event_pending(struct drm_crtc *crtc)
++{
++      struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++
++      return !!vc4_crtc->event;
++}
++
+ static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc)
+ {
+       struct drm_crtc *crtc = &vc4_crtc->base;
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -440,6 +440,7 @@ int vc4_bo_stats_debugfs(struct seq_file
+ extern struct platform_driver vc4_crtc_driver;
+ int vc4_enable_vblank(struct drm_device *dev, unsigned int crtc_id);
+ void vc4_disable_vblank(struct drm_device *dev, unsigned int crtc_id);
++bool vc4_event_pending(struct drm_crtc *crtc);
+ int vc4_crtc_debugfs_regs(struct seq_file *m, void *arg);
+ int vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
+                           unsigned int flags, int *vpos, int *hpos,
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -119,17 +119,34 @@ static int vc4_atomic_commit(struct drm_
+       /* Make sure that any outstanding modesets have finished. */
+       if (nonblock) {
+-              ret = down_trylock(&vc4->async_modeset);
+-              if (ret) {
++              struct drm_crtc *crtc;
++              struct drm_crtc_state *crtc_state;
++              unsigned long flags;
++              bool busy = false;
++
++              /*
++               * If there's an undispatched event to send then we're
++               * obviously still busy.  If there isn't, then we can
++               * unconditionally wait for the semaphore because it
++               * shouldn't be contended (for long).
++               *
++               * This is to prevent a race where queuing a new flip
++               * from userspace immediately on receipt of an event
++               * beats our clean-up and returns EBUSY.
++               */
++              spin_lock_irqsave(&dev->event_lock, flags);
++              for_each_crtc_in_state(state, crtc, crtc_state, i)
++                      busy |= vc4_event_pending(crtc);
++              spin_unlock_irqrestore(&dev->event_lock, flags);
++              if (busy) {
+                       kfree(c);
+                       return -EBUSY;
+               }
+-      } else {
+-              ret = down_interruptible(&vc4->async_modeset);
+-              if (ret) {
+-                      kfree(c);
+-                      return ret;
+-              }
++      }
++      ret = down_interruptible(&vc4->async_modeset);
++      if (ret) {
++              kfree(c);
++              return ret;
+       }
+       ret = drm_atomic_helper_prepare_planes(dev, state);
index 847391f3822cbd68c4924442d2cb84976b406f7e..335d34980f5d669c08281549077f68ba7f76eaa9 100644 (file)
@@ -79,3 +79,6 @@ acpi-blacklist-make-dell-latitude-3350-ethernet-work.patch
 serial-8250_pci-detach-low-level-driver-during-pci-error-recovery.patch
 usb-gadget-udc-atmel-remove-memory-leak.patch
 powerpc-mm-fix-build-break-when-cma-n-spapr_tce_iommu-y.patch
+clk-bcm2835-fix-fixed_divider-of-pllh_aux.patch
+drm-vc4-fix-race-between-page-flip-completion-event-and-clean-up.patch
+drm-vc4-fix-clock_select-setting-for-the-vec-encoder.patch