drm/amd/display: Add FAMS validation before trying to use it

To ensure that FAMS can be used, DC must check if there is VRR support.
This commit adds the required configuration to ensure FAMS can be executed in the target system.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 61eec5aa406716fb6a1f26e6d60f005f08e277dd..105f705bd91a8877fce4f4a3e85d86dd1ad1952b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2604,6 +2604,12 @@ static enum surface_update_type check_update_surfaces_for_stream(
 
                if (stream_update->mst_bw_update)
                        su_flags->bits.mst_bw = 1;
+
+               if (stream_update->stream && stream_update->stream->freesync_on_desktop &&
+                       (stream_update->vrr_infopacket || stream_update->allow_freesync ||
+                               stream_update->vrr_active_variable))
+                       su_flags->bits.fams_changed = 1;
+
                if (stream_update->crtc_timing_adjust && dc_extended_blank_supported(dc))
                        su_flags->bits.crtc_timing_adjust = 1;
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index 25284006019c3b6d9fdb5c881ea5314ea601632f..270282fbda4ab881e2219f4e1855999074df7a6e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -131,6 +131,7 @@ union stream_update_flags {
                uint32_t dsc_changed : 1;
                uint32_t mst_bw : 1;
                uint32_t crtc_timing_adjust : 1;
+               uint32_t fams_changed : 1;
        } bits;
 
        uint32_t raw;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index c95f000b63b28d7e5eeb0580fca4d6e0a3063a00..34b08d90dc1da8e9dd8264492e3f9e9e25c5bb10 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -301,7 +301,12 @@ static void optc3_wait_drr_doublebuffer_pending_clear(struct timing_generator *o
 
 void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
 {
-       optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max);
+       struct dc *dc = optc->ctx->dc;
+
+       if (dc->caps.dmub_caps.mclk_sw && !dc->debug.disable_fams)
+               dc_dmub_srv_drr_update_cmd(dc, optc->inst, vtotal_min, vtotal_max);
+       else
+               optc1_set_vtotal_min_max(optc, vtotal_min, vtotal_max);
 }
 
 void optc3_tg_init(struct timing_generator *optc)

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 598fa1de54ce3ac72545fbdf1e04a63501b1aa11..1c55d3b01f53e216cc3e7b95c006a265badd54c6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -360,7 +360,7 @@ union dmub_fw_boot_status {
                uint32_t optimized_init_done : 1; /**< 1 if optimized init done */
                uint32_t restore_required : 1; /**< 1 if driver should call restore */
                uint32_t defer_load : 1; /**< 1 if VBIOS data is deferred programmed */
-               uint32_t reserved : 1;
+               uint32_t fams_enabled : 1; /**< 1 if VBIOS data is deferred programmed */
                uint32_t detection_required: 1; /**<  if detection need to be triggered by driver */
                uint32_t hw_power_init_done: 1; /**< 1 if hw power init is completed */
        } bits; /**< status bits */