drm/amd/display: Remove useless assignments

[WHAT & HOW]
"split_pipe" are assigned to test_pipe and then immediately are updated
to other values. The same also applies to "status" as well.

Similarly, "id", "dwb" and "unused_dpps" are assigned but the functions
immediately return, and thus they have no effects.

As a results, the assignments removed.

This fixes 5 UNUSED_VALUE issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
index 866b0abcff1bad6acee175ba94c4a65f407de2c9..9190c1328d5b2df9a747414ffdb9f313dd7923b9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
@@ -209,8 +209,6 @@ static bool optimize_configuration(struct dml2_context *dml2, struct dml2_wrappe
                                p->cur_display_config->output.OutputEncoder[0], p->cur_mode_support_info->DSCEnabled[0]) - 1;
 
                        if (odms_needed <= unused_dpps) {
-                               unused_dpps -= odms_needed;
-
                                if (odms_needed == 1) {
                                        p->new_policy->ODMUse[0] = dml_odm_use_policy_combine_2to1;
                                        optimization_done = true;

diff --git a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c
index f344478e9bd4737e5603e49af6b4d4b97e43ccc3..b099989d9364f64fc330e1dad3f3af02e173ebdd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c
+++ b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c
@@ -443,7 +443,6 @@ struct gpio *dal_gpio_create_irq(
        case GPIO_ID_GPIO_PAD:
        break;
        default:
-               id = GPIO_ID_HPD;
                ASSERT_CRITICAL(false);
                return NULL;
        }

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
index a6a1db5ba8bad13ab331bb05777c67d9c74fce67..681bb92c60690d965cc65c1a2d1858867b992e3b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
@@ -3453,7 +3453,6 @@ static bool dcn10_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx)
                r2 = test_pipe->plane_res.scl_data.recout;
                r2_r = r2.x + r2.width;
                r2_b = r2.y + r2.height;
-               split_pipe = test_pipe;
 
                /**
                 * There is another half plane on same layer because of

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
index bf9b5daea2af2d287d8a0b2299f0a5abd3fa46f8..9e1777f727c449e974b0b0f2ff09460617fb9a8e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
@@ -486,7 +486,6 @@ bool dcn30_mmhubbub_warmup(
        }
        /*following is the original: warmup each DWB's mcif buffer*/
        for (i = 0; i < num_dwb; i++) {
-               dwb = dc->res_pool->dwbc[wb_info[i].dwb_pipe_inst];
                mcif_wb = dc->res_pool->mcif_wb[wb_info[i].dwb_pipe_inst];
                /*warmup is for VM mode only*/
                if (wb_info[i].mcif_buf_params.p_vmid == 0)

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index 49a37f5ee28e78cbb01e0d006d8b975e4b57f685..65176b59dcb28147491d7f7179a8bca1a39b2e41 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -1068,7 +1068,6 @@ static bool dcn401_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx)
                r2 = test_pipe->plane_res.scl_data.recout;
                r2_r = r2.x + r2.width;
                r2_b = r2.y + r2.height;
-               split_pipe = test_pipe;
 
                /**
                 * There is another half plane on same layer because of

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
index b5cf75975fffd64774aa9ee8ed64ba44e50deb6e..ccf8096dde2909957eef6100633e4b3e3ec66d09 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
@@ -412,7 +412,6 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence(
 
                        /* 5. check CR done*/
                        if (dp_is_cr_done(lane_count, dpcd_lane_status)) {
-                               status = LINK_TRAINING_SUCCESS;
                                break;
                        }