rockchip: rk322x: add CLK_EMMC_SAMPLE clock support

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 48ed14b2aff85342e0d1a1ba0a7f24e52fd0156e..4b599fbb242c68d63937f970fb291d95aec941d7 100644 (file)
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -217,6 +217,7 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
        switch (periph) {
        case HCLK_EMMC:
        case SCLK_EMMC:
+       case SCLK_EMMC_SAMPLE:
                con = readl(&cru->cru_clksel_con[11]);
                mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
                con = readl(&cru->cru_clksel_con[12]);
@@ -293,6 +294,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
        switch (periph) {
        case HCLK_EMMC:
        case SCLK_EMMC:
+       case SCLK_EMMC_SAMPLE:
                rk_clrsetreg(&cru->cru_clksel_con[11],
                             EMMC_PLL_MASK,
                             mux << EMMC_PLL_SHIFT);