2_13-branch'.
Cherrypick from master 2002-10-21 14:59:30 UTC Richard Sandiford <rdsandiford@googlemail.com> ' * config/tc-mips.c (mips_need_elf_addend_fixup): Return true':
gas/testsuite/gas/mips/elf-rel7.d
gas/testsuite/gas/mips/elf-rel7.s
ld/testsuite/ld-i386/combreloc.d
ld/testsuite/ld-i386/combreloc.s
ld/testsuite/ld-i386/reloc.d
ld/testsuite/ld-i386/reloc.s
ld/testsuite/ld-i386/tlsindntpoff.dd
ld/testsuite/ld-i386/tlsindntpoff.s
ld/testsuite/ld-powerpc/powerpc.exp
ld/testsuite/ld-powerpc/reloc.d
ld/testsuite/ld-powerpc/reloc.s
ld/testsuite/ld-sh/sh64/gotplt.d
ld/testsuite/ld-sh/sh64/gotplt.map
ld/testsuite/ld-sh/sh64/gotplt.s
--- /dev/null
+#objdump: -dr --prefix-addresses
+#name: MIPS ELF reloc 7
+
+.*: +file format elf.*mips.*
+
+Disassembly of section \.text:
+0+00 <.*> lui a0,0x0
+ 0: R_MIPS_HI16 .barsec
+0+04 <.*> lw a0,8\(a0\)
+ 4: R_MIPS_LO16 .barsec
+0+08 <.*> lui a0,0x0
+ 8: R_MIPS_HI16 bar
+0+0c <.*> lw a0,4\(a0\)
+ c: R_MIPS_LO16 bar
+0+10 <.*> lui a0,0x0
+ 10: R_MIPS_HI16 bar
+0+14 <.*> lw a0,8\(a0\)
+ 14: R_MIPS_LO16 bar
+0+18 <.*> lui a0,0x0
+ 18: R_MIPS_HI16 frob
+0+1c <.*> lw a0,0\(a0\)
+ 1c: R_MIPS_LO16 frob
+0+20 <.*> lui a0,0x0
+ 20: R_MIPS_HI16 frob
+0+24 <.*> lw a0,4\(a0\)
+ 24: R_MIPS_LO16 frob
+0+28 <.*> lui a0,0x0
+ 28: R_MIPS_HI16 frob
+0+2c <.*> lw a0,16\(a0\)
+ 2c: R_MIPS_LO16 frob
+#pass
--- /dev/null
+ .global frob
+ .section .barsec,"aM",@progbits,8
+ .word 0,1
+bar: .word 2,3
+frob: .word 4,5
+ .text
+foo: lw $4,bar
+ lw $4,bar+4
+ lw $4,bar+8
+ lw $4,frob
+ lw $4,frob+4
+ lw $4,frob+16
--- /dev/null
+# Test that orphan reloc sections are merged into .rel.dyn with
+# -z combreloc.
+#source: combreloc.s
+#as: --32
+#ld: -shared -melf_i386 -z combreloc
+#readelf: -r
+#target: i?86-*-*
+
+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
+ Offset Info Type Sym.Value Sym. Name
+[0-9a-f]+ [0-9a-f]+01 R_386_32 [0-9a-f]+ _start
+[0-9a-f]+ [0-9a-f]+01 R_386_32 [0-9a-f]+ _start
+[0-9a-f]+ [0-9a-f]+01 R_386_32 [0-9a-f]+ _start
+[0-9a-f]+ [0-9a-f]+06 R_386_GLOB_DAT [0-9a-f]+ _start
+
+Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+ Offset Info Type Sym.Value Sym. Name
+[0-9a-f]+ [0-9a-f]+07 R_386_JUMP_SLOT [0-9a-f]+ foo
--- /dev/null
+ .text
+ .globl _start, foo
+ .type _start,@function
+_start:
+ pushl %ebp
+ movl %esp, %ebp
+ pushl %ebx
+ call 1f
+1: popl %ebx
+ addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
+ movl _start@GOT(%ebx), %eax
+ movl (%eax), %eax
+ call foo@PLT
+ movl (%esp), %ebx
+ leave
+foo: ret
+ .data
+ .long _start
+ .section "__libc_subfreeres", "aw", @progbits
+ .long _start
+ .section "__libc_atexit", "aw", @progbits
+ .long _start
--- /dev/null
+# Test that orphan reloc sections are placed before .rel.plt even when
+# .rel.plt is the only reloc section.
+#source: reloc.s
+#as: --32
+#ld: -shared -melf_i386 -z nocombreloc
+#objdump: -hw
+#target: i?86-*-*
+
+.*: +file format elf32-i386
+#...
+.*\.relplatypus.*
+#...
+.*\.rel\.plt.*
+# x86 ld doesn't output non-alloc reloc sections to shared libs, so disable
+# the following two lines for the time being.
+# #...
+# .*\.relechidna.*
+#pass
--- /dev/null
+ .section echidna
+ .long .text
+
+ .section platypus,"ax"
+ .long .text
+
+ .text
+ jmp _start@plt
--- /dev/null
+#source: tlsindntpoff.s
+#as: --32
+#ld: -melf_i386
+#objdump: -drj.text
+#target: i?86-*-*
+
+.*: +file format elf32-i386
+
+Disassembly of section .text:
+
+[0-9a-f]+000 <_start>:
+ [0-9a-f]+000: 39 d8[ ]+cmp %ebx,%eax
+ [0-9a-f]+002: 73 08[ ]+jae [0-9a-f]+00c <_start\+0xc>
+ [0-9a-f]+004: b8 fc ff ff ff[ ]+mov \$0xfffffffc,%eax
+ [0-9a-f]+009: 65 8b 00[ ]+mov %gs:\(%eax\),%eax
+ [0-9a-f]+00c: c3[ ]+ret *
--- /dev/null
+ /* Force .got aligned to 4K, so it very likely gets at 0x804a100
+ (0x60 bytes .tdata and 0xa0 bytes .dynamic) */
+ .data
+ .balign 4096
+ .section ".tdata", "awT", @progbits
+ .globl foo
+foo: .long 27
+
+ /* Force .text aligned to 4K, so it very likely gets at 0x8049000. */
+ .text
+ .balign 4096
+ .globl _start
+ .type _start,@function
+_start:
+ cmp %ebx, %eax
+ jae 1f
+ movl foo@indntpoff, %eax
+ movl %gs:(%eax), %eax
+1: ret
--- /dev/null
+# Expect script for ld-powerpc tests
+# Copyright (C) 2002 Free Software Foundation
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+
+if { ![istarget "powerpc*-*-*"] } {
+ return
+}
+
+# powerpc 32 bit ELF only at the moment.
+
+if { [istarget "*-*-macos*"] || [istarget "*-*-netware*"]
+ || [istarget "*-*-pe"] || [istarget "*-*-winnt*"]
+ || [istarget "*-*-cygwin*"] || [istarget "*-*-aix*"]
+ || [istarget "*-*-beos*"] || [istarget "powerpc64*-*-*"] } {
+ return
+}
+
+# List contains test-items with 3 items followed by 2 lists:
+# 0:name 1:ld options 2:assembler options
+# 3:filenames of assembler files 4: action and options. 5: name of output file
+
+# Actions:
+# objdump: Apply objdump options on result. Compare with regex (last arg).
+# nm: Apply nm options on result. Compare with regex (last arg).
+# readelf: Apply readelf options on result. Compare with regex (last arg).
+
+set ppcelftests {
+ {"Reloc section order" "-shared -z nocombreloc" "" {reloc.s}
+ {{objdump -hw reloc.d}} "reloc.so"}
+}
+
+run_ld_link_tests $ppcelftests
--- /dev/null
+# Test that orphan reloc sections are placed before .rela.plt even when
+# .rela.plt is the only reloc section. Also tests that orphan non-alloc
+# reloc sections go after alloc sections.
+
+#source: reloc.s
+#ld: -shared -z nocombreloc
+#objdump: -hw
+
+.*: +file format elf.*
+#...
+.*\.relaplatypus.*
+#...
+.*\.rela\.plt.*
+#...
+.*\.relaechidna.*
+#pass
--- /dev/null
+ .section echidna
+ .long .text
+
+ .section platypus,"ax"
+ .long .text
+
+ .text
+ b _start@plt
+ nop
--- /dev/null
+#source: gotplt.s
+#as: --abi=32 --isa=SHmedia
+#ld: -shared -mshelf32 --version-script=$srcdir/$subdir/gotplt.map
+#readelf: -r
+#target: sh64-*-elf
+
+# Make sure that gotplt relocations of forced local symbols
+# use the GOT.
+
+Relocation section '\.rela\.dyn' at offset 0x3fc contains 1 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0000052c 000000a5 R_SH_RELATIVE 00000408
--- /dev/null
+GLIBC_2.2 {
+ local:
+ xxx;
+};
--- /dev/null
+ .text
+ .global xxx
+xxx:
+ ptabs r18, tr0
+ blink tr0, r63
+ .global yyy
+yyy:
+ movi ((xxx@GOTPLT) & 65535), r1
projects / thirdparty / binutils-gdb.git / commitdiff
