]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
3.10-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 18 Nov 2013 16:50:32 +0000 (08:50 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 18 Nov 2013 16:50:32 +0000 (08:50 -0800)
added patches:
perf-fix-perf-ring-buffer-memory-ordering.patch

queue-3.10/perf-fix-perf-ring-buffer-memory-ordering.patch [new file with mode: 0644]
queue-3.10/series

diff --git a/queue-3.10/perf-fix-perf-ring-buffer-memory-ordering.patch b/queue-3.10/perf-fix-perf-ring-buffer-memory-ordering.patch
new file mode 100644 (file)
index 0000000..12d9379
--- /dev/null
@@ -0,0 +1,109 @@
+From bf378d341e4873ed928dc3c636252e6895a21f50 Mon Sep 17 00:00:00 2001
+From: Peter Zijlstra <peterz@infradead.org>
+Date: Mon, 28 Oct 2013 13:55:29 +0100
+Subject: perf: Fix perf ring buffer memory ordering
+
+From: Peter Zijlstra <peterz@infradead.org>
+
+commit bf378d341e4873ed928dc3c636252e6895a21f50 upstream.
+
+The PPC64 people noticed a missing memory barrier and crufty old
+comments in the perf ring buffer code. So update all the comments and
+add the missing barrier.
+
+When the architecture implements local_t using atomic_long_t there
+will be double barriers issued; but short of introducing more
+conditional barrier primitives this is the best we can do.
+
+Reported-by: Victor Kaplansky <victork@il.ibm.com>
+Tested-by: Victor Kaplansky <victork@il.ibm.com>
+Signed-off-by: Peter Zijlstra <peterz@infradead.org>
+Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
+Cc: michael@ellerman.id.au
+Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
+Cc: Michael Neuling <mikey@neuling.org>
+Cc: Frederic Weisbecker <fweisbec@gmail.com>
+Cc: anton@samba.org
+Cc: benh@kernel.crashing.org
+Link: http://lkml.kernel.org/r/20131025173749.GG19466@laptop.lan
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Cc: Michael Neuling <mikey@neuling.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
+index 009a655a5d35..2fc1602e23bb 100644
+--- a/include/uapi/linux/perf_event.h
++++ b/include/uapi/linux/perf_event.h
+@@ -456,13 +456,15 @@ struct perf_event_mmap_page {
+       /*
+        * Control data for the mmap() data buffer.
+        *
+-       * User-space reading the @data_head value should issue an rmb(), on
+-       * SMP capable platforms, after reading this value -- see
+-       * perf_event_wakeup().
++       * User-space reading the @data_head value should issue an smp_rmb(),
++       * after reading this value.
+        *
+        * When the mapping is PROT_WRITE the @data_tail value should be
+-       * written by userspace to reflect the last read data. In this case
+-       * the kernel will not over-write unread data.
++       * written by userspace to reflect the last read data, after issueing
++       * an smp_mb() to separate the data read from the ->data_tail store.
++       * In this case the kernel will not over-write unread data.
++       *
++       * See perf_output_put_handle() for the data ordering.
+        */
+       __u64   data_head;              /* head in the data section */
+       __u64   data_tail;              /* user-space written tail */
+diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
+index cd55144270b5..9c2ddfbf4525 100644
+--- a/kernel/events/ring_buffer.c
++++ b/kernel/events/ring_buffer.c
+@@ -87,10 +87,31 @@ again:
+               goto out;
+       /*
+-       * Publish the known good head. Rely on the full barrier implied
+-       * by atomic_dec_and_test() order the rb->head read and this
+-       * write.
++       * Since the mmap() consumer (userspace) can run on a different CPU:
++       *
++       *   kernel                             user
++       *
++       *   READ ->data_tail                   READ ->data_head
++       *   smp_mb()   (A)                     smp_rmb()       (C)
++       *   WRITE $data                        READ $data
++       *   smp_wmb()  (B)                     smp_mb()        (D)
++       *   STORE ->data_head                  WRITE ->data_tail
++       *
++       * Where A pairs with D, and B pairs with C.
++       *
++       * I don't think A needs to be a full barrier because we won't in fact
++       * write data until we see the store from userspace. So we simply don't
++       * issue the data WRITE until we observe it. Be conservative for now.
++       *
++       * OTOH, D needs to be a full barrier since it separates the data READ
++       * from the tail WRITE.
++       *
++       * For B a WMB is sufficient since it separates two WRITEs, and for C
++       * an RMB is sufficient since it separates two READs.
++       *
++       * See perf_output_begin().
+        */
++      smp_wmb();
+       rb->user_page->data_head = head;
+       /*
+@@ -154,9 +175,11 @@ int perf_output_begin(struct perf_output_handle *handle,
+                * Userspace could choose to issue a mb() before updating the
+                * tail pointer. So that all reads will be completed before the
+                * write is issued.
++               *
++               * See perf_output_put_handle().
+                */
+               tail = ACCESS_ONCE(rb->user_page->data_tail);
+-              smp_rmb();
++              smp_mb();
+               offset = head = local_read(&rb->head);
+               head += size;
+               if (unlikely(!perf_output_space(rb, tail, offset, head)))
index 52890deffa21e08a645fc355e378f43c9a6a5f99..834a37f1bcce1c8c831009d09de10c5b7e10330c 100644 (file)
@@ -13,3 +13,4 @@ hyperv-fb-add-pci-stub.patch
 usb-add-new-zte-3g-dongle-s-pid-to-option.c.patch
 alsa-hda-hdmi-fix-reported-channel-map-on-common-default-layouts.patch
 tracing-fix-potential-out-of-bounds-in-trace_get_user.patch
+perf-fix-perf-ring-buffer-memory-ordering.patch