3.14-stable patches

added patches:
	drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch
	drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch
	drm-radeon-set-correct-ce-ram-size-for-cik.patch

diff --git a/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch b/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch
new file mode 100644 (file)
index 0000000..3b9859a
--- /dev/null
+++ b/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch
@@ -0,0 +1,28 @@
+From f0d7bfb9407fccb6499ec01c33afe43512a439a2 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 5 Nov 2014 17:14:32 -0500
+Subject: drm/radeon: add missing crtc unlock when setting up the MC
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit f0d7bfb9407fccb6499ec01c33afe43512a439a2 upstream.
+
+Need to unlock the crtc after updating the blanking state.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/evergreen.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -2573,6 +2573,7 @@ void evergreen_mc_stop(struct radeon_dev
+                                       WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
+                                       tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;
+                                       WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
++                                      WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
+                               }
+                       } else {
+                               tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

diff --git a/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch b/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch
new file mode 100644 (file)
index 0000000..4eeae35
--- /dev/null
+++ b/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch
@@ -0,0 +1,119 @@
+From 8efe82ca908400785253c8f0dfcf301e6bd93488 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 3 Nov 2014 09:57:46 -0500
+Subject: drm/radeon: make sure mode init is complete in bandwidth_update
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 8efe82ca908400785253c8f0dfcf301e6bd93488 upstream.
+
+The power management code calls into the display code for
+certain things.  If certain power management sysfs attributes
+are called before the driver has finished initializing all of
+the hardware we can run into problems with uninitialized
+modesetting state.  Add a check to make sure modesetting
+init has completed to the bandwidth update callbacks to
+fix this.  Can be triggered by the tlp and laptop start
+up scripts depending on the timing.
+
+bugs:
+https://bugzilla.kernel.org/show_bug.cgi?id=83611
+https://bugs.freedesktop.org/show_bug.cgi?id=85771
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c       |    3 +++
+ drivers/gpu/drm/radeon/evergreen.c |    3 +++
+ drivers/gpu/drm/radeon/r100.c      |    3 +++
+ drivers/gpu/drm/radeon/rs600.c     |    3 +++
+ drivers/gpu/drm/radeon/rs690.c     |    3 +++
+ drivers/gpu/drm/radeon/rv515.c     |    3 +++
+ drivers/gpu/drm/radeon/si.c        |    3 +++
+ 7 files changed, 21 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -8893,6 +8893,9 @@ void dce8_bandwidth_update(struct radeon
+       u32 num_heads = 0, lb_size;
+       int i;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       for (i = 0; i < rdev->num_crtc; i++) {
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -2362,6 +2362,9 @@ void evergreen_bandwidth_update(struct r
+       u32 num_heads = 0, lb_size;
+       int i;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       for (i = 0; i < rdev->num_crtc; i++) {
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -3219,6 +3219,9 @@ void r100_bandwidth_update(struct radeon
+       uint32_t pixel_bytes1 = 0;
+       uint32_t pixel_bytes2 = 0;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       if (rdev->mode_info.crtcs[0]->base.enabled) {
+--- a/drivers/gpu/drm/radeon/rs600.c
++++ b/drivers/gpu/drm/radeon/rs600.c
+@@ -890,6 +890,9 @@ void rs600_bandwidth_update(struct radeo
+       u32 d1mode_priority_a_cnt, d2mode_priority_a_cnt;
+       /* FIXME: implement full support */
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       if (rdev->mode_info.crtcs[0]->base.enabled)
+--- a/drivers/gpu/drm/radeon/rs690.c
++++ b/drivers/gpu/drm/radeon/rs690.c
+@@ -579,6 +579,9 @@ void rs690_bandwidth_update(struct radeo
+       u32 d1mode_priority_a_cnt, d1mode_priority_b_cnt;
+       u32 d2mode_priority_a_cnt, d2mode_priority_b_cnt;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       if (rdev->mode_info.crtcs[0]->base.enabled)
+--- a/drivers/gpu/drm/radeon/rv515.c
++++ b/drivers/gpu/drm/radeon/rv515.c
+@@ -1276,6 +1276,9 @@ void rv515_bandwidth_update(struct radeo
+       struct drm_display_mode *mode0 = NULL;
+       struct drm_display_mode *mode1 = NULL;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       if (rdev->mode_info.crtcs[0]->base.enabled)
+--- a/drivers/gpu/drm/radeon/si.c
++++ b/drivers/gpu/drm/radeon/si.c
+@@ -2227,6 +2227,9 @@ void dce6_bandwidth_update(struct radeon
+       u32 num_heads = 0, lb_size;
+       int i;
+ 
++      if (!rdev->mode_info.mode_config_initialized)
++              return;
++
+       radeon_update_display_priority(rdev);
+ 
+       for (i = 0; i < rdev->num_crtc; i++) {

diff --git a/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch b/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch
new file mode 100644 (file)
index 0000000..bf1d4b7
--- /dev/null
+++ b/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch
@@ -0,0 +1,34 @@
+From dc4edad6530a9b7b66c3d905e2bc06021a05dcad Mon Sep 17 00:00:00 2001
+From: Jammy Zhou <Jammy.Zhou@amd.com>
+Date: Mon, 3 Nov 2014 08:58:20 -0500
+Subject: drm/radeon: set correct CE ram size for CIK
+
+From: Jammy Zhou <Jammy.Zhou@amd.com>
+
+commit dc4edad6530a9b7b66c3d905e2bc06021a05dcad upstream.
+
+CE ram size is 32k/0k/0k for GFX/CS0/CS1 with CIK
+
+Ported from amdgpu driver.
+
+Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -3936,8 +3936,8 @@ static int cik_cp_gfx_start(struct radeo
+       /* init the CE partitions.  CE only used for gfx on CIK */
+       radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
+       radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));
+-      radeon_ring_write(ring, 0xc000);
+-      radeon_ring_write(ring, 0xc000);
++      radeon_ring_write(ring, 0x8000);
++      radeon_ring_write(ring, 0x8000);
+ 
+       /* setup clear context state */
+       radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

diff --git a/queue-3.14/series b/queue-3.14/series
index c0455f6d3d0f4924455a2ae032c4a5f7a2d456ac..eb7793686821a488ef299a4f3888cc70786e4fa6 100644 (file)
--- a/queue-3.14/series
+++ b/queue-3.14/series
@@ -35,3 +35,6 @@ mac80211-properly-flush-delayed-scan-work-on-interface-removal.patch
 mac80211-use-secondary-channel-offset-ie-also-beacons-during-csa.patch
 mac80211-schedule-the-actual-switch-of-the-station-before-csa-count-0.patch
 mac80211-fix-use-after-free-in-defragmentation.patch
+drm-radeon-set-correct-ce-ram-size-for-cik.patch
+drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch
+drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch