Just like was done recently for x86-64 (commit
4998f9ea9d35): Even if
the assembler avoids using the relaxable relocation for inapplicable
insns, the relocation type can still appear for other reasons. Be more
thorough in the opcode checking we do, to avoid bogusly altering other
insns.
Furthermore correct an opcode mask (even if with the added condition
that's now fully benign).
modrm = 0xc0 | (modrm & 0x38) >> 3;
opcode = 0xf7;
}
- else
+ else if ((opcode | 0x38) == 0x3b)
{
/* Convert "binop foo@GOT(%reg1), %reg2" to
"binop $foo, %reg2". */
- modrm = (0xc0
- | (modrm & 0x38) >> 3
- | (opcode & 0x3c));
+ modrm = 0xc0 | ((modrm & 0x38) >> 3) | (opcode & 0x38);
opcode = 0x81;
}
+ else
+ return true;
+
bfd_put_8 (abfd, modrm, contents + roff - 1);
r_type = R_386_32;
}
run_dump_test "load5b"
run_dump_test "load6"
run_dump_test "load7"
+run_dump_test "load8"
run_dump_test "pr19175"
run_dump_test "pr19615"
run_dump_test "pr19636-1a"
--- /dev/null
+#as: --32 -mrelax-relocations=yes
+#ld: -melf_i386 -z noseparate-code
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+8048074 <_start>:
+[ ]*[a-f0-9]+: 12 05 90 90 04 08 adc 0x8049090,%al
+[ ]*[a-f0-9]+: 6b 05 90 90 04 08 01 imul \$(0x)?1,0x8049090,%eax
+[ ]*[a-f0-9]+: 84 35 90 90 04 08 test %dh,0x8049090
+[ ]*[a-f0-9]+: 87 05 90 90 04 08 xchg %eax,0x8049090
+#pass
--- /dev/null
+ .data
+ .type bar, @object
+bar:
+ .byte 1
+ .size bar, .-bar
+
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ # Other insns must not be accidentally transformed.
+ adc 0, %al
+ .reloc .-4, R_386_GOT32X, bar
+ imul $1, 0, %eax
+ .reloc .-5, R_386_GOT32X, bar
+ test %dh, 0
+ .reloc .-4, R_386_GOT32X, bar
+ xchg 0, %eax
+ .reloc .-4, R_386_GOT32X, bar
+
+ .size _start, .-_start