--- /dev/null
+From 4542b6a0fa6b48d9ae6b41c1efeb618b7a221b2a Mon Sep 17 00:00:00 2001
+From: Dima Zavin <dima@android.com>
+Date: Thu, 29 Mar 2012 20:44:06 +0100
+Subject: ARM: 7365/1: drop unused parameter from flush_cache_user_range
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Dima Zavin <dima@android.com>
+
+commit 4542b6a0fa6b48d9ae6b41c1efeb618b7a221b2a upstream.
+
+vma isn't used and flush_cache_user_range isn't a standard macro that
+is used on several archs with the same prototype. In fact only unicore32
+has a macro with the same name (with an identical implementation and no
+in-tree users).
+
+This is a part of a patch proposed by Dima Zavin (with Message-id:
+1272439931-12795-1-git-send-email-dima@android.com) that didn't get
+accepted.
+
+Cc: Dima Zavin <dima@android.com>
+Acked-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Cc: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+
+---
+ arch/arm/include/asm/cacheflush.h | 2 +-
+ arch/arm/kernel/traps.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/include/asm/cacheflush.h
++++ b/arch/arm/include/asm/cacheflush.h
+@@ -249,7 +249,7 @@ extern void flush_cache_page(struct vm_a
+ * Harvard caches are synchronised for the user space address range.
+ * This is used for the ARM private sys_cacheflush system call.
+ */
+-#define flush_cache_user_range(vma,start,end) \
++#define flush_cache_user_range(start,end) \
+ __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end))
+
+ /*
+--- a/arch/arm/kernel/traps.c
++++ b/arch/arm/kernel/traps.c
+@@ -451,7 +451,7 @@ do_cache_op(unsigned long start, unsigne
+ if (end > vma->vm_end)
+ end = vma->vm_end;
+
+- flush_cache_user_range(vma, start, end);
++ flush_cache_user_range(start, end);
+ }
+ up_read(&mm->mmap_sem);
+ }
--- /dev/null
+From 435a7ef52db7d86e67a009b36cac1457f8972391 Mon Sep 17 00:00:00 2001
+From: Dima Zavin <dima@android.com>
+Date: Mon, 30 Apr 2012 10:26:14 +0100
+Subject: ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem held
+
+From: Dima Zavin <dima@android.com>
+
+commit 435a7ef52db7d86e67a009b36cac1457f8972391 upstream.
+
+We can't be holding the mmap_sem while calling flush_cache_user_range
+because the flush can fault. If we fault on a user address, the
+page fault handler will try to take mmap_sem again. Since both places
+acquire the read lock, most of the time it succeeds. However, if another
+thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
+between the call to flush_cache_user_range and the fault, the down_read
+in do_page_fault will deadlock.
+
+[will: removed drop of vma parameter as already queued by rmk (7365/1)]
+
+Acked-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Dima Zavin <dima@android.com>
+Signed-off-by: John Stultz <john.stultz@linaro.org>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/traps.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/kernel/traps.c
++++ b/arch/arm/kernel/traps.c
+@@ -451,7 +451,9 @@ do_cache_op(unsigned long start, unsigne
+ if (end > vma->vm_end)
+ end = vma->vm_end;
+
++ up_read(&mm->mmap_sem);
+ flush_cache_user_range(start, end);
++ return;
+ }
+ up_read(&mm->mmap_sem);
+ }
--- /dev/null
+From 9868a060ccf769c08ec378a9829137e272e9a92c Mon Sep 17 00:00:00 2001
+From: Marcus Folkesson <marcus.folkesson@gmail.com>
+Date: Thu, 3 May 2012 15:56:36 +0200
+Subject: i2c: davinci: Free requested IRQ in remove
+
+From: Marcus Folkesson <marcus.folkesson@gmail.com>
+
+commit 9868a060ccf769c08ec378a9829137e272e9a92c upstream.
+
+The freed IRQ is not necessary the one requested in probe.
+Even if it was, with two or more i2c-controllers it will fails anyway.
+
+Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
+Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/i2c/busses/i2c-davinci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/i2c/busses/i2c-davinci.c
++++ b/drivers/i2c/busses/i2c-davinci.c
+@@ -755,7 +755,7 @@ static int davinci_i2c_remove(struct pla
+ dev->clk = NULL;
+
+ davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);
+- free_irq(IRQ_I2C, dev);
++ free_irq(dev->irq, dev);
+ iounmap(dev->base);
+ kfree(dev);
+
--- /dev/null
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Mon, 30 Apr 2012 11:57:44 -0700
+Subject: isci: fix oem parameter validation on single controller skus
+
+From: Dan Williams <dan.j.williams@intel.com>
+
+commit fc25f79af321c01a739150ba2c09435cf977a63d upstream.
+
+OEM parameters [1] are parsed from the platform option-rom / efi
+driver. By default the driver was validating the parameters for the
+dual-controller case, but in single-controller case only the first set
+of parameters may be valid.
+
+Limit the validation to the number of actual controllers detected
+otherwise the driver may fail to parse the valid parameters leading to
+driver-load or runtime failures.
+
+[1] the platform specific set of phy address, configuration,and analog
+ tuning values
+
+Reported-by: Dave Jiang <dave.jiang@intel.com>
+Tested-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+[bwh: Backported to 3.2: adjust context]
+Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/scsi/isci/init.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/scsi/isci/init.c
++++ b/drivers/scsi/isci/init.c
+@@ -454,7 +454,7 @@ static int __devinit isci_pci_probe(stru
+ if (!orom)
+ orom = isci_request_oprom(pdev);
+
+- for (i = 0; orom && i < ARRAY_SIZE(orom->ctrl); i++) {
++ for (i = 0; orom && i < num_controllers(pdev); i++) {
+ if (sci_oem_parameters_validate(&orom->ctrl[i])) {
+ dev_warn(&pdev->dev,
+ "[%d]: invalid oem parameters detected, falling back to firmware\n", i);
--- /dev/null
+From bbbc4c4d8c5face097d695f9bf3a39647ba6b7e7 Mon Sep 17 00:00:00 2001
+From: Nicolas Pitre <nicolas.pitre@linaro.org>
+Date: Mon, 16 Apr 2012 19:16:54 -0400
+Subject: mmc: sdio: avoid spurious calls to interrupt handlers
+
+From: Nicolas Pitre <nicolas.pitre@linaro.org>
+
+commit bbbc4c4d8c5face097d695f9bf3a39647ba6b7e7 upstream.
+
+Commit 06e8935feb ("optimized SDIO IRQ handling for single irq")
+introduced some spurious calls to SDIO function interrupt handlers,
+such as when the SDIO IRQ thread is started, or the safety check
+performed upon a system resume. Let's add a flag to perform the
+optimization only when a real interrupt is signaled by the host
+driver and we know there is no point confirming it.
+
+Reported-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
+Signed-off-by: Nicolas Pitre <nico@linaro.org>
+Signed-off-by: Chris Ball <cjb@laptop.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/core/sdio.c | 2 +-
+ drivers/mmc/core/sdio_irq.c | 11 +++++++----
+ include/linux/mmc/host.h | 2 ++
+ 3 files changed, 10 insertions(+), 5 deletions(-)
+
+--- a/drivers/mmc/core/sdio.c
++++ b/drivers/mmc/core/sdio.c
+@@ -665,7 +665,7 @@ static int mmc_sdio_resume(struct mmc_ho
+ }
+
+ if (!err && host->sdio_irqs)
+- mmc_signal_sdio_irq(host);
++ wake_up_process(host->sdio_irq_thread);
+ mmc_release_host(host);
+
+ /*
+--- a/drivers/mmc/core/sdio_irq.c
++++ b/drivers/mmc/core/sdio_irq.c
+@@ -27,18 +27,20 @@
+
+ #include "sdio_ops.h"
+
+-static int process_sdio_pending_irqs(struct mmc_card *card)
++static int process_sdio_pending_irqs(struct mmc_host *host)
+ {
++ struct mmc_card *card = host->card;
+ int i, ret, count;
+ unsigned char pending;
+ struct sdio_func *func;
+
+ /*
+ * Optimization, if there is only 1 function interrupt registered
+- * call irq handler directly
++ * and we know an IRQ was signaled then call irq handler directly.
++ * Otherwise do the full probe.
+ */
+ func = card->sdio_single_irq;
+- if (func) {
++ if (func && host->sdio_irq_pending) {
+ func->irq_handler(func);
+ return 1;
+ }
+@@ -115,7 +117,8 @@ static int sdio_irq_thread(void *_host)
+ ret = __mmc_claim_host(host, &host->sdio_irq_thread_abort);
+ if (ret)
+ break;
+- ret = process_sdio_pending_irqs(host->card);
++ ret = process_sdio_pending_irqs(host);
++ host->sdio_irq_pending = false;
+ mmc_release_host(host);
+
+ /*
+--- a/include/linux/mmc/host.h
++++ b/include/linux/mmc/host.h
+@@ -267,6 +267,7 @@ struct mmc_host {
+
+ unsigned int sdio_irqs;
+ struct task_struct *sdio_irq_thread;
++ bool sdio_irq_pending;
+ atomic_t sdio_irq_thread_abort;
+
+ mmc_pm_flag_t pm_flags; /* requested pm features */
+@@ -312,6 +313,7 @@ extern void mmc_request_done(struct mmc_
+ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
+ {
+ host->ops->enable_sdio_irq(host, 0);
++ host->sdio_irq_pending = true;
+ wake_up_process(host->sdio_irq_thread);
+ }
+
nouveau-nouveau_set_bo_placement-takes-ttm-flags.patch
smsusb-add-autodetection-support-for-usb-id-2040-c0a0.patch
media-uvcvideo-fix-enuminput-handling.patch
+x86-mce-fix-check-for-processor-context-when-machine-check-was-taken.patch
+mmc-sdio-avoid-spurious-calls-to-interrupt-handlers.patch
+tile-fix-bug-where-fls-0-was-not-returning-0.patch
+isci-fix-oem-parameter-validation-on-single-controller-skus.patch
+arm-7365-1-drop-unused-parameter-from-flush_cache_user_range.patch
+arm-7409-1-do-not-call-flush_cache_user_range-with-mmap_sem-held.patch
+i2c-davinci-free-requested-irq-in-remove.patch
--- /dev/null
+From 9f1d62bed7f015d11b9164078b7fea433b474114 Mon Sep 17 00:00:00 2001
+From: Chris Metcalf <cmetcalf@tilera.com>
+Date: Fri, 25 May 2012 12:32:09 -0400
+Subject: tile: fix bug where fls(0) was not returning 0
+
+From: Chris Metcalf <cmetcalf@tilera.com>
+
+commit 9f1d62bed7f015d11b9164078b7fea433b474114 upstream.
+
+This is because __builtin_clz(0) returns 64 for the "undefined" case
+of 0, since the builtin just does a right-shift 32 and "clz" instruction.
+So, use the alpha approach of casting to u32 and using __builtin_clzll().
+
+Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/tile/include/asm/bitops.h | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/tile/include/asm/bitops.h
++++ b/arch/tile/include/asm/bitops.h
+@@ -77,6 +77,11 @@ static inline int ffs(int x)
+ return __builtin_ffs(x);
+ }
+
++static inline int fls64(__u64 w)
++{
++ return (sizeof(__u64) * 8) - __builtin_clzll(w);
++}
++
+ /**
+ * fls - find last set bit in word
+ * @x: the word to search
+@@ -90,12 +95,7 @@ static inline int ffs(int x)
+ */
+ static inline int fls(int x)
+ {
+- return (sizeof(int) * 8) - __builtin_clz(x);
+-}
+-
+-static inline int fls64(__u64 w)
+-{
+- return (sizeof(__u64) * 8) - __builtin_clzll(w);
++ return fls64((unsigned int) x);
+ }
+
+ static inline unsigned int __arch_hweight32(unsigned int w)
--- /dev/null
+From 875e26648cf9b6db9d8dc07b7959d7c61fb3f49c Mon Sep 17 00:00:00 2001
+From: Tony Luck <tony.luck@intel.com>
+Date: Wed, 23 May 2012 14:14:22 -0700
+Subject: x86/mce: Fix check for processor context when machine check was taken.
+
+From: Tony Luck <tony.luck@intel.com>
+
+commit 875e26648cf9b6db9d8dc07b7959d7c61fb3f49c upstream.
+
+Linus pointed out that there was no value is checking whether m->ip
+was zero - because zero is a legimate value. If we have a reliable
+(or faked in the VM86 case) "m->cs" we can use it to tell whether we
+were in user mode or kernelwhen the machine check hit.
+
+Reported-by: Linus Torvalds <torvalds@linuxfoundation.org>
+Signed-off-by: Tony Luck <tony.luck@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/mcheck/mce-severity.c | 16 ++++++++++------
+ 1 file changed, 10 insertions(+), 6 deletions(-)
+
+--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
++++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
+@@ -101,15 +101,19 @@ static struct severity {
+ };
+
+ /*
+- * If the EIPV bit is set, it means the saved IP is the
+- * instruction which caused the MCE.
++ * If mcgstatus indicated that ip/cs on the stack were
++ * no good, then "m->cs" will be zero and we will have
++ * to assume the worst case (IN_KERNEL) as we actually
++ * have no idea what we were executing when the machine
++ * check hit.
++ * If we do have a good "m->cs" (or a faked one in the
++ * case we were executing in VM86 mode) we can use it to
++ * distinguish an exception taken in user from from one
++ * taken in the kernel.
+ */
+ static int error_context(struct mce *m)
+ {
+- if (m->mcgstatus & MCG_STATUS_EIPV)
+- return (m->ip && (m->cs & 3) == 3) ? IN_USER : IN_KERNEL;
+- /* Unknown, assume kernel */
+- return IN_KERNEL;
++ return ((m->cs & 3) == 3) ? IN_USER : IN_KERNEL;
+ }
+
+ int mce_severity(struct mce *a, int tolerant, char **msg)
projects / thirdparty / kernel / stable-queue.git / commitdiff
