drm/amd/display: Parse RECEIVE_PORT0_CAP capabilities from DPCD

[Why]
DPCD register RECEIVE_PORT0_CAP contains HBlank expansion/reduction
capabilities of a DP device. These capabilities are required to enable
HBlank expansion/reduction logic.

[How]
Read raw RECEIVE_PORT0_CAP register values and store parsed fields.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index c92232c14c50b4b5762a872144f58e737253eccc..2b1fb1de43c551b731b5f49c2152352a8acd884d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -2383,6 +2383,13 @@ struct dc_sink_dsc_caps {
        struct dsc_dec_dpcd_caps dsc_dec_caps;
 };
 
+struct dc_sink_hblank_expansion_caps {
+       // 'true' if these are virtual DPCD's HBlank expansion caps (immediately upstream of sink in MST topology),
+       // 'false' if they are sink's HBlank expansion caps
+       bool is_virtual_dpcd_hblank_expansion;
+       struct hblank_expansion_dpcd_caps dpcd_caps;
+};
+
 struct dc_sink_fec_caps {
        bool is_rx_fec_supported;
        bool is_topology_fec_supported;
@@ -2409,6 +2416,7 @@ struct dc_sink {
        struct scdc_caps scdc_caps;
        struct dc_sink_dsc_caps dsc_caps;
        struct dc_sink_fec_caps fec_caps;
+       struct dc_sink_hblank_expansion_caps hblank_expansion_caps;
 
        bool is_vsc_sdp_colorimetry_supported;
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 8dd6eb044829a73c894c784b03b5e1c28458adc3..94ce8fe744810557aca6595f4b84d4ad733d9e8d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -969,6 +969,21 @@ union dp_sink_video_fallback_formats {
        uint8_t raw;
 };
 
+union dp_receive_port0_cap {
+       struct {
+               uint8_t RESERVED                                        :1;
+               uint8_t LOCAL_EDID_PRESENT                      :1;
+               uint8_t ASSOCIATED_TO_PRECEDING_PORT:1;
+               uint8_t HBLANK_EXPANSION_CAPABLE        :1;
+               uint8_t BUFFER_SIZE_UNIT                        :1;
+               uint8_t BUFFER_SIZE_PER_PORT            :1;
+               uint8_t HBLANK_REDUCTION_CAPABLE        :1;
+               uint8_t RESERVED2:1;
+               uint8_t BUFFER_SIZE:8;
+       } bits;
+       uint8_t raw[2];
+};
+
 union dpcd_max_uncompressed_pixel_rate_cap {
        struct {
                uint16_t max_uncompressed_pixel_rate_cap        :15;
@@ -1193,6 +1208,7 @@ struct dpcd_caps {
 
        struct replay_info pr_info;
        uint16_t edp_oled_emission_rate;
+       union dp_receive_port0_cap receive_port0_cap;
 };
 
 union dpcd_sink_ext_caps {

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 9466b63644d5a8f6f982141a413d9722f5667fc2..0243d1b675d8845db5df852f438170b666a94084 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -874,6 +874,14 @@ struct dsc_dec_dpcd_caps {
        bool is_dp; /* Decoded format */
 };
 
+struct hblank_expansion_dpcd_caps {
+       bool expansion_supported;
+       bool reduction_supported;
+       bool buffer_unit_bytes; /* True: buffer size in bytes. False: buffer size in pixels*/
+       bool buffer_per_port; /* True: buffer size per port. False: buffer size per lane*/
+       uint32_t buffer_size; /* Add 1 to value and multiply by 32 */
+};
+
 struct dc_golden_table {
        uint16_t dc_golden_table_ver;
        uint32_t aux_dphy_rx_control0_val;

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index ce9d799d2386df752fbcc967982d3f77e107aeec..d1d869cc85c79f7d4fc33e7f0630bdb7f1375799 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -1779,6 +1779,11 @@ static bool retrieve_link_cap(struct dc_link *link)
        link->test_pattern_enabled = false;
        link->compliance_test_state.raw = 0;
 
+       link->dpcd_caps.receive_port0_cap.raw[0] =
+                       dpcd_data[DP_RECEIVE_PORT_0_CAP_0 - DP_DPCD_REV];
+       link->dpcd_caps.receive_port0_cap.raw[1] =
+                       dpcd_data[DP_RECEIVE_PORT_0_BUFFER_SIZE - DP_DPCD_REV];
+
        /* read sink count */
        core_link_read_dpcd(link,
                        DP_SINK_COUNT,