drm/etnaviv: Disable SH_EU clock gating on VIPNano-Si+

Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP
and for other affected core revisions.
Taken from linux-imx lf-6.1.36-2.1.0, specifically [1].

[1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c#L2747-L2761

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 5329ef2be590d294b1377a7170a2c41166de1064..d84d73c197fc31e6462c3c34d7c02e0df37c5071 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -654,6 +654,12 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
                pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
                       VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA;
 
+       /* Disable SH_EU clock gating on affected core revisions. */
+       if (etnaviv_is_model_rev(gpu, 0x8000, 0x7200) ||
+           etnaviv_is_model_rev(gpu, 0x8000, 0x8002) ||
+           etnaviv_is_model_rev(gpu, 0x9200, 0x6304))
+               pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH_EU;
+
        pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
        pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;