]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
3.0-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 24 Jan 2013 20:12:51 +0000 (12:12 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 24 Jan 2013 20:12:51 +0000 (12:12 -0800)
added patches:
ahci-add-identifiers-for-asm106x-devices.patch
drm-i915-implement-wadisablehizplaneswhenmsaaenabled.patch

queue-3.0/ahci-add-identifiers-for-asm106x-devices.patch [new file with mode: 0644]
queue-3.0/drm-i915-implement-wadisablehizplaneswhenmsaaenabled.patch [new file with mode: 0644]
queue-3.0/series

diff --git a/queue-3.0/ahci-add-identifiers-for-asm106x-devices.patch b/queue-3.0/ahci-add-identifiers-for-asm106x-devices.patch
new file mode 100644 (file)
index 0000000..fb31c89
--- /dev/null
@@ -0,0 +1,50 @@
+From 7b4f6ecacb14f384adc1a5a67ad95eb082c02bd1 Mon Sep 17 00:00:00 2001
+From: Alan Cox <alan@linux.intel.com>
+Date: Tue, 4 Sep 2012 16:25:25 +0100
+Subject: ahci: Add identifiers for ASM106x devices
+
+From: Alan Cox <alan@linux.intel.com>
+
+commit 7b4f6ecacb14f384adc1a5a67ad95eb082c02bd1 upstream.
+
+They don't always appear as AHCI class devices but instead as IDE class.
+
+Based on an initial patch by Hiroaki Nito
+
+Resolves-bug: https://bugzilla.kernel.org/show_bug.cgi?id=42804
+Signed-off-by: Alan Cox <alan@linux.intel.com>
+Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
+Signed-off-by: Abdallah Chatila <abdallah.chatila@ericsson.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/ahci.c      |    6 ++++++
+ include/linux/pci_ids.h |    2 ++
+ 2 files changed, 8 insertions(+)
+
+--- a/drivers/ata/ahci.c
++++ b/drivers/ata/ahci.c
+@@ -402,6 +402,12 @@ static const struct pci_device_id ahci_p
+       /* Promise */
+       { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci },   /* PDC42819 */
++      /* Asmedia */
++      { PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci },   /* ASM1060 */
++      { PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci },   /* ASM1060 */
++      { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci },   /* ASM1061 */
++      { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci },   /* ASM1062 */
++
+       /* Generic, PCI class code for AHCI */
+       { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+         PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -2390,6 +2390,8 @@
+ #define PCI_VENDOR_ID_AZWAVE          0x1a3b
++#define PCI_VENDOR_ID_ASMEDIA         0x1b21
++
+ #define PCI_VENDOR_ID_TEKRAM          0x1de1
+ #define PCI_DEVICE_ID_TEKRAM_DC290    0xdc29
diff --git a/queue-3.0/drm-i915-implement-wadisablehizplaneswhenmsaaenabled.patch b/queue-3.0/drm-i915-implement-wadisablehizplaneswhenmsaaenabled.patch
new file mode 100644 (file)
index 0000000..93f9f1d
--- /dev/null
@@ -0,0 +1,55 @@
+From 4283908ef7f11a72c3b80dd4cf026f1a86429f82 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Fri, 14 Dec 2012 23:38:28 +0100
+Subject: drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabled
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 4283908ef7f11a72c3b80dd4cf026f1a86429f82 upstream.
+
+Quoting from Bspec, 3D_CHICKEN1, bit 10
+
+This bit needs to be set always to "1", Project: DevSNB "
+
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Abdallah Chatila <abdallah.chatila@ericsson.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h      |    3 +++
+ drivers/gpu/drm/i915/intel_display.c |    4 ++++
+ 2 files changed, 7 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -27,6 +27,8 @@
+ #define _PIPE(pipe, a, b) ((a) + (pipe)*((b)-(a)))
++#define _MASKED_BIT_ENABLE(a) (((a) << 16) | (a))
++
+ /*
+  * The Bridge device's PCI config space has information about the
+  * fb aperture size and the amount of pre-reserved memory.
+@@ -354,6 +356,7 @@
+  * the enables for writing to the corresponding low bit.
+  */
+ #define _3D_CHICKEN   0x02084
++#define _3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB     (1 << 10)
+ #define _3D_CHICKEN2  0x0208c
+ /* Disables pipelining of read flushes past the SF-WIZ interface.
+  * Required on all Ironlake steppings according to the B-Spec, but the
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -7412,6 +7412,10 @@ static void gen6_init_clock_gating(struc
+                  I915_READ(ILK_DISPLAY_CHICKEN2) |
+                  ILK_ELPIN_409_SELECT);
++      /* WaDisableHiZPlanesWhenMSAAEnabled */
++      I915_WRITE(_3D_CHICKEN,
++                 _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
++
+       I915_WRITE(WM3_LP_ILK, 0);
+       I915_WRITE(WM2_LP_ILK, 0);
+       I915_WRITE(WM1_LP_ILK, 0);
index 4a3c89cccb1e262585c3ffb29c1dfe02cca41e69..c1ce0eafa5e9826217ef50cee8bfc43dec819d31 100644 (file)
@@ -7,3 +7,5 @@ drivers-firmware-dmi_scan.c-check-dmi-version-when-get.patch
 drivers-firmware-dmi_scan.c-fetch-dmi-version-from-smbios-if-it-exists.patch
 serial-8250-increase-pass_limit.patch
 staging-usbip-changed-function-return-type-to-void.patch
+drm-i915-implement-wadisablehizplaneswhenmsaaenabled.patch
+ahci-add-identifiers-for-asm106x-devices.patch