]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
powerpc: Fix TLE build for SPE (BZ #22926)
authorAdhemerval Zanella <adhemerval.zanella@linaro.org>
Mon, 5 Mar 2018 17:46:24 +0000 (14:46 -0300)
committerAdhemerval Zanella <adhemerval.zanella@linaro.org>
Wed, 7 Mar 2018 20:39:44 +0000 (17:39 -0300)
Some SPE opcodes clashes with some recent PowerISA opcodes and
until recently gas did not complain about it.  However binutils
recently changed it and now VLE configured gas does not support to
assembler some instruction that might class with VLE (HTM for
instance).  It also does not help that glibc build hardware lock
elision support as default (regardless of assembler support).

Although runtime will not actually enables TLE on SPE hardware
(since kernel will not advertise it), I see little advantage on
adding HTM support on SPE built glibc.  SPE uses an incompatible
ABI which does not allow share the same build with default
powerpc and HTM code slows down SPE without any benefict.

This patch fixes it by only building HTM when SPE configuration
is not used.

Checked with a powerpc-linux-gnuspe build. I also did some sniff
tests on a e500 hardware without any issue.

[BZ #22926]
* sysdeps/powerpc/powerpc32/sysdep.h (ABORT_TRANSACTION_IMPL): Define
empty for __SPE__.
* sysdeps/powerpc/sysdep.h (ABORT_TRANSACTION): Likewise.
* sysdeps/unix/sysv/linux/powerpc/elision-lock.c (__lll_lock_elision):
Do not build hardware transactional code for __SPE__.
* sysdeps/unix/sysv/linux/powerpc/elision-trylock.c
(__lll_trylock_elision): Likewise.
* sysdeps/unix/sysv/linux/powerpc/elision-unlock.c
(__lll_unlock_elision): Likewise.

ChangeLog
sysdeps/powerpc/powerpc32/sysdep.h
sysdeps/powerpc/sysdep.h
sysdeps/unix/sysv/linux/powerpc/elision-lock.c
sysdeps/unix/sysv/linux/powerpc/elision-trylock.c
sysdeps/unix/sysv/linux/powerpc/elision-unlock.c

index 57e6be997165b7d0ae536dc52fbdcff3656b37ed..dfb96aa372afec13f1bb814c020aa0f377568943 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,16 @@
 2018-03-07  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
+       [BZ #22926]
+       * sysdeps/powerpc/powerpc32/sysdep.h (ABORT_TRANSACTION_IMPL): Define
+       empty for __SPE__.
+       * sysdeps/powerpc/sysdep.h (ABORT_TRANSACTION): Likewise.
+       * sysdeps/unix/sysv/linux/powerpc/elision-lock.c (__lll_lock_elision):
+       Do not build hardware transactional code for __SPE__.
+       * sysdeps/unix/sysv/linux/powerpc/elision-trylock.c
+       (__lll_trylock_elision): Likewise.
+       * sysdeps/unix/sysv/linux/powerpc/elision-unlock.c
+       (__lll_unlock_elision): Likewise.
+
        * sysdeps/nptl/fork.c (ARCH_FORK): Replace by auch_fork.
        * sysdeps/unix/sysv/linux/alpha/arch-fork.h: Remove file.
        * sysdeps/unix/sysv/linux/riscv/arch-fork.h: Likewise.
index 8e32a2a1312c72274fbcc46a32deb73cc7316d28..5f1294ead3071db9f787049ef0960e8221d469ff 100644 (file)
@@ -90,7 +90,7 @@ GOT_LABEL:                    ;                                             \
   cfi_endproc;                                                               \
   ASM_SIZE_DIRECTIVE(name)
 
-#if ! IS_IN(rtld)
+#if !IS_IN(rtld) && !defined(__SPE__)
 # define ABORT_TRANSACTION_IMPL \
     cmpwi    2,0;              \
     beq      1f;               \
index 03db75fcb745b684632c7a5de313ad10673d0bba..8a6d236caa44856824d5dcecaf1f984a45e1cbcc 100644 (file)
    we abort transaction just before syscalls.
 
    [1] Documentation/powerpc/transactional_memory.txt [Syscalls]  */
-#if !IS_IN(rtld)
+#if !IS_IN(rtld) && !defined(__SPE__)
 # define ABORT_TRANSACTION \
   ({                                           \
     if (THREAD_GET_TM_CAPABLE ())              \
index b7093feab92cf22a36641207ba76c2452f4f39bd..98a23f0dd246523e55732043c53a37abb4bd38c5 100644 (file)
@@ -45,6 +45,7 @@
 int
 __lll_lock_elision (int *lock, short *adapt_count, EXTRAARG int pshared)
 {
+#ifndef __SPE__
   /* adapt_count is accessed concurrently but is just a hint.  Thus,
      use atomic accesses but relaxed MO is sufficient.  */
   if (atomic_load_relaxed (adapt_count) > 0)
@@ -82,5 +83,6 @@ __lll_lock_elision (int *lock, short *adapt_count, EXTRAARG int pshared)
                          aconf.skip_lock_out_of_tbegin_retries);
 
 use_lock:
+#endif
   return LLL_LOCK ((*lock), pshared);
 }
index b74a81064835d5be2cfc0e9d35a307977d0389e1..fabb03b2c4a0ab97bde8882c95ca12c026478569 100644 (file)
@@ -30,6 +30,7 @@
 int
 __lll_trylock_elision (int *futex, short *adapt_count)
 {
+#ifndef __SPE__
   /* Implement POSIX semantics by forbiding nesting elided trylocks.  */
   __libc_tabort (_ABORT_NESTED_TRYLOCK);
 
@@ -65,5 +66,6 @@ __lll_trylock_elision (int *futex, short *adapt_count)
     }
 
 use_lock:
+#endif
   return lll_trylock (*futex);
 }
index dcfab199d794aba62ca6b149bb551777b2b7da45..14e0680ee9b5a45b116efdff4d46a3ad233167aa 100644 (file)
@@ -23,6 +23,7 @@
 int
 __lll_unlock_elision (int *lock, short *adapt_count, int pshared)
 {
+#ifndef __SPE__
   /* When the lock was free we're in a transaction.  */
   if (*lock == 0)
     __libc_tend (0);
@@ -39,5 +40,8 @@ __lll_unlock_elision (int *lock, short *adapt_count, int pshared)
 
       lll_unlock ((*lock), pshared);
     }
+#else
+  lll_unlock ((*lock), pshared);
+#endif
   return 0;
 }