return 0;
}
+static int tps65941_ldo_volt2val(__maybe_unused int idx, int uV)
+{
+ if (uV > TPS65941_LDO_VOLT_MAX || uV < TPS65941_LDO_VOLT_MIN)
+ return -EINVAL;
+
+ return ((uV - 600000) / 50000 + 0x4) << TPS65941_LDO_MODE_MASK;
+}
+
static int tps65941_ldo_val2volt(__maybe_unused int idx, int val)
{
if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX)
static const struct tps65941_reg_conv_ops ldo_conv_ops[] = {
[TPS65941_LDO_CONV_OPS_IDX] = {
.volt_mask = TPS65941_LDO_VOLT_MASK,
- .volt2val = tps65941_buck_volt2val,
+ .volt2val = tps65941_ldo_volt2val,
.val2volt = tps65941_ldo_val2volt,
},
[TPS65224_LDO_CONV_OPS_IDX] = {
static int tps65941_ldo_val(struct udevice *dev, int op, int *uV)
{
unsigned int hex, adr;
- int ret, ret_volt, idx;
+ int ret, ret_volt, idx, ldo_bypass;
struct dm_regulator_uclass_plat *uc_pdata;
const struct tps65941_reg_conv_ops *conv_ops;
ulong chip_id;
if (ret < 0)
return ret;
+ ldo_bypass = ret & TPS65941_LDO_BYPASS_EN;
ret &= conv_ops->volt_mask;
+ ret = ret >> TPS65941_LDO_MODE_MASK;
ret_volt = conv_ops->val2volt(idx, ret);
if (ret_volt < 0)
return ret_volt;
ret &= ~TPS65224_LDO_VOLT_MASK;
ret |= hex;
} else {
- ret = hex;
+ ret = hex | ldo_bypass;
}
ret = pmic_reg_write(dev->parent, adr, ret);
#define TPS65941_BUCK_VOLT_MAX 3340000
#define TPS65941_BUCK_MODE_MASK 0x1
-#define TPS65941_LDO_VOLT_MASK 0x3E
+#define TPS65941_LDO_VOLT_MASK 0x7E
#define TPS65941_LDO_VOLT_MAX_HEX 0x3A
#define TPS65941_LDO_VOLT_MIN_HEX 0x4
#define TPS65941_LDO_VOLT_MAX 3300000
+#define TPS65941_LDO_VOLT_MIN 600000
#define TPS65941_LDO_MODE_MASK 0x1
#define TPS65941_LDO_BYPASS_EN 0x80
#define TP65941_BUCK_CONF_SLEW_MASK 0x7