arm64/mte: Standardise GMID field name definitions

Usually our defines for bitfields in system registers do not include a SYS_
prefix but those for GMID do. In preparation for automatic generation of
defines remove that prefix. No functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-9-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index e62baf910249dbe3f9fbfc629595a9a015d2e69b..cc6a847f8bdd960daca15253b85d1c1577383598 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1136,8 +1136,8 @@
 #define SYS_RGSR_EL1_SEED_MASK 0xffffUL
 
 /* GMID_EL1 field definitions */
-#define SYS_GMID_EL1_BS_SHIFT  0
-#define SYS_GMID_EL1_BS_SIZE   4
+#define GMID_EL1_BS_SHIFT      0
+#define GMID_EL1_BS_SIZE       4
 
 /* TFSR{,E0}_EL1 bit definitions */
 #define SYS_TFSR_EL1_TF0_SHIFT 0

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index b9c5b11c17c3c7d2dbfbc4ed6022108a25c8527d..7d838b5f7e20e3a330d1953e56bd7853bc73992a 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -459,7 +459,7 @@ static const struct arm64_ftr_bits ftr_dczid[] = {
 };
 
 static const struct arm64_ftr_bits ftr_gmid[] = {
-       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, SYS_GMID_EL1_BS_SHIFT, 4, 0),
+       ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, GMID_EL1_BS_SHIFT, 4, 0),
        ARM64_FTR_END,
 };
 

diff --git a/arch/arm64/lib/mte.S b/arch/arm64/lib/mte.S
index eeb9e45bcce82d2d11636938d8641724b784fa5d..1b7c93ae7e6306c4b31c5c6d3f7e3563217579e6 100644 (file)
--- a/arch/arm64/lib/mte.S
+++ b/arch/arm64/lib/mte.S
@@ -18,7 +18,7 @@
  */
        .macro  multitag_transfer_size, reg, tmp
        mrs_s   \reg, SYS_GMID_EL1
-       ubfx    \reg, \reg, #SYS_GMID_EL1_BS_SHIFT, #SYS_GMID_EL1_BS_SIZE
+       ubfx    \reg, \reg, #GMID_EL1_BS_SHIFT, #GMID_EL1_BS_SIZE
        mov     \tmp, #4
        lsl     \reg, \tmp, \reg
        .endm