]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
i40e: add mask to apply valid bits for itr_idx
authorLukasz Czapnik <lukasz.czapnik@intel.com>
Wed, 13 Aug 2025 10:45:17 +0000 (12:45 +0200)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Thu, 18 Sep 2025 22:46:30 +0000 (15:46 -0700)
The ITR index (itr_idx) is only 2 bits wide. When constructing the
register value for QINT_RQCTL, all fields are ORed together. Without
masking, higher bits from itr_idx may overwrite adjacent fields in the
register.

Apply I40E_QINT_RQCTL_ITR_INDX_MASK to ensure only the intended bits are
set.

Fixes: 5c3c48ac6bf5 ("i40e: implement virtual device interface")
Cc: stable@vger.kernel.org
Signed-off-by: Lukasz Czapnik <lukasz.czapnik@intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Signed-off-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Rafal Romanowski <rafal.romanowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c

index f29941c0034299ba8dc42d75e63ffb9505ea9644..f9b2197f09425ffa962dc8fedd0a786b1cf0b7f7 100644 (file)
@@ -448,7 +448,7 @@ static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
                    (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
                    (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
                    BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
-                   (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
+                   FIELD_PREP(I40E_QINT_RQCTL_ITR_INDX_MASK, itr_idx);
                wr32(hw, reg_idx, reg);
        }