]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Sat, 24 Jul 2021 00:16:44 +0000 (00:16 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Sat, 24 Jul 2021 00:16:44 +0000 (00:16 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/analyzer/ChangeLog
gcc/c-family/ChangeLog
gcc/cp/ChangeLog
gcc/fortran/ChangeLog
gcc/testsuite/ChangeLog
libstdc++-v3/ChangeLog

index b70e99c079cf1ab61d5a704d4ff58302498d6469..b86653fcb0b7a455a46474bf92857e7d2e7e8013 100644 (file)
@@ -1,3 +1,291 @@
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       PR rtl-optimization/101562
+       * expmed.c (store_integral_bit_field): Only use movstrict_optab
+       if the operand isn't paradoxical.
+
+2021-07-23  Aldy Hernandez  <aldyh@redhat.com>
+
+       * gimple-array-bounds.h (class array_bounds_checker): Change
+       ranges type to range_query.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst1_s64_x2): Use
+       __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_oi one vector at a time.
+       (vst1_u64_x2): Likewise.
+       (vst1_f64_x2): Likewise.
+       (vst1_s8_x2): Likewise.
+       (vst1_p8_x2): Likewise.
+       (vst1_s16_x2): Likewise.
+       (vst1_p16_x2): Likewise.
+       (vst1_s32_x2): Likewise.
+       (vst1_u8_x2): Likewise.
+       (vst1_u16_x2): Likewise.
+       (vst1_u32_x2): Likewise.
+       (vst1_f16_x2): Likewise.
+       (vst1_f32_x2): Likewise.
+       (vst1_p64_x2): Likewise.
+       (vst1q_s8_x2): Likewise.
+       (vst1q_p8_x2): Likewise.
+       (vst1q_s16_x2): Likewise.
+       (vst1q_p16_x2): Likewise.
+       (vst1q_s32_x2): Likewise.
+       (vst1q_s64_x2): Likewise.
+       (vst1q_u8_x2): Likewise.
+       (vst1q_u16_x2): Likewise.
+       (vst1q_u32_x2): Likewise.
+       (vst1q_u64_x2): Likewise.
+       (vst1q_f16_x2): Likewise.
+       (vst1q_f32_x2): Likewise.
+       (vst1q_f64_x2): Likewise.
+       (vst1q_p64_x2): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst1_s64_x3): Use
+       __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_ci one vector at a time.
+       (vst1_u64_x3): Likewise.
+       (vst1_f64_x3): Likewise.
+       (vst1_s8_x3): Likewise.
+       (vst1_p8_x3): Likewise.
+       (vst1_s16_x3): Likewise.
+       (vst1_p16_x3): Likewise.
+       (vst1_s32_x3): Likewise.
+       (vst1_u8_x3): Likewise.
+       (vst1_u16_x3): Likewise.
+       (vst1_u32_x3): Likewise.
+       (vst1_f16_x3): Likewise.
+       (vst1_f32_x3): Likewise.
+       (vst1_p64_x3): Likewise.
+       (vst1q_s8_x3): Likewise.
+       (vst1q_p8_x3): Likewise.
+       (vst1q_s16_x3): Likewise.
+       (vst1q_p16_x3): Likewise.
+       (vst1q_s32_x3): Likewise.
+       (vst1q_s64_x3): Likewise.
+       (vst1q_u8_x3): Likewise.
+       (vst1q_u16_x3): Likewise.
+       (vst1q_u32_x3): Likewise.
+       (vst1q_u64_x3): Likewise.
+       (vst1q_f16_x3): Likewise.
+       (vst1q_f32_x3): Likewise.
+       (vst1q_f64_x3): Likewise.
+       (vst1q_p64_x3): Likewise.
+
+2021-07-23  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/101504
+       * config/i386/i386.c (ix86_gen_scratch_sse_rtx): Don't return
+       hard register when LRA is in progress.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst1_s8_x4): Use
+       __builtin_memcpy instead of using a union.
+       (vst1q_s8_x4): Likewise.
+       (vst1_s16_x4): Likewise.
+       (vst1q_s16_x4): Likewise.
+       (vst1_s32_x4): Likewise.
+       (vst1q_s32_x4): Likewise.
+       (vst1_u8_x4): Likewise.
+       (vst1q_u8_x4): Likewise.
+       (vst1_u16_x4): Likewise.
+       (vst1q_u16_x4): Likewise.
+       (vst1_u32_x4): Likewise.
+       (vst1q_u32_x4): Likewise.
+       (vst1_f16_x4): Likewise.
+       (vst1q_f16_x4): Likewise.
+       (vst1_f32_x4): Likewise.
+       (vst1q_f32_x4): Likewise.
+       (vst1_p8_x4): Likewise.
+       (vst1q_p8_x4): Likewise.
+       (vst1_p16_x4): Likewise.
+       (vst1q_p16_x4): Likewise.
+       (vst1_s64_x4): Likewise.
+       (vst1_u64_x4): Likewise.
+       (vst1_p64_x4): Likewise.
+       (vst1q_s64_x4): Likewise.
+       (vst1q_u64_x4): Likewise.
+       (vst1q_p64_x4): Likewise.
+       (vst1_f64_x4): Likewise.
+       (vst1q_f64_x4): Likewise.
+
+2021-07-23  Jonathan Wrightt  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst2_s64): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_oi one vector
+       at a time.
+       (vst2_u64): Likewise.
+       (vst2_f64): Likewise.
+       (vst2_s8): Likewise.
+       (vst2_p8): Likewise.
+       (vst2_s16): Likewise.
+       (vst2_p16): Likewise.
+       (vst2_s32): Likewise.
+       (vst2_u8): Likewise.
+       (vst2_u16): Likewise.
+       (vst2_u32): Likewise.
+       (vst2_f16): Likewise.
+       (vst2_f32): Likewise.
+       (vst2_p64): Likewise.
+       (vst2q_s8): Likewise.
+       (vst2q_p8): Likewise.
+       (vst2q_s16): Likewise.
+       (vst2q_p16): Likewise.
+       (vst2q_s32): Likewise.
+       (vst2q_s64): Likewise.
+       (vst2q_u8): Likewise.
+       (vst2q_u16): Likewise.
+       (vst2q_u32): Likewise.
+       (vst2q_u64): Likewise.
+       (vst2q_f16): Likewise.
+       (vst2q_f32): Likewise.
+       (vst2q_f64): Likewise.
+       (vst2q_p64): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst3_s64): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_ci one vector
+       at a time.
+       (vst3_u64): Likewise.
+       (vst3_f64): Likewise.
+       (vst3_s8): Likewise.
+       (vst3_p8): Likewise.
+       (vst3_s16): Likewise.
+       (vst3_p16): Likewise.
+       (vst3_s32): Likewise.
+       (vst3_u8): Likewise.
+       (vst3_u16): Likewise.
+       (vst3_u32): Likewise.
+       (vst3_f16): Likewise.
+       (vst3_f32): Likewise.
+       (vst3_p64): Likewise.
+       (vst3q_s8): Likewise.
+       (vst3q_p8): Likewise.
+       (vst3q_s16): Likewise.
+       (vst3q_p16): Likewise.
+       (vst3q_s32): Likewise.
+       (vst3q_s64): Likewise.
+       (vst3q_u8): Likewise.
+       (vst3q_u16): Likewise.
+       (vst3q_u32): Likewise.
+       (vst3q_u64): Likewise.
+       (vst3q_f16): Likewise.
+       (vst3q_f32): Likewise.
+       (vst3q_f64): Likewise.
+       (vst3q_p64): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vst4_s64): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_xi one vector
+       at a time.
+       (vst4_u64): Likewise.
+       (vst4_f64): Likewise.
+       (vst4_s8): Likewise.
+       (vst4_p8): Likewise.
+       (vst4_s16): Likewise.
+       (vst4_p16): Likewise.
+       (vst4_s32): Likewise.
+       (vst4_u8): Likewise.
+       (vst4_u16): Likewise.
+       (vst4_u32): Likewise.
+       (vst4_f16): Likewise.
+       (vst4_f32): Likewise.
+       (vst4_p64): Likewise.
+       (vst4q_s8): Likewise.
+       (vst4q_p8): Likewise.
+       (vst4q_s16): Likewise.
+       (vst4q_p16): Likewise.
+       (vst4q_s32): Likewise.
+       (vst4q_s64): Likewise.
+       (vst4q_u8): Likewise.
+       (vst4q_u16): Likewise.
+       (vst4q_u32): Likewise.
+       (vst4q_u64): Likewise.
+       (vst4q_f16): Likewise.
+       (vst4q_f32): Likewise.
+       (vst4q_f64): Likewise.
+       (vst4q_p64): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vtbx4_s8): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_oi one vector
+       at a time.
+       (vtbx4_u8): Likewise.
+       (vtbx4_p8): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vtbl3_s8): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_oi one vector
+       at a time.
+       (vtbl3_u8): Likewise.
+       (vtbl3_p8): Likewise.
+       (vtbl4_s8): Likewise.
+       (vtbl4_u8): Likewise.
+       (vtbl4_p8): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vqtbx2_s8): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_oi one vector
+       at a time.
+       (vqtbx2_u8): Likewise.
+       (vqtbx2_p8): Likewise.
+       (vqtbx2q_s8): Likewise.
+       (vqtbx2q_u8): Likewise.
+       (vqtbx2q_p8): Likewise.
+       (vqtbx3_s8): Use __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_ci one vector at a time.
+       (vqtbx3_u8): Likewise.
+       (vqtbx3_p8): Likewise.
+       (vqtbx3q_s8): Likewise.
+       (vqtbx3q_u8): Likewise.
+       (vqtbx3q_p8): Likewise.
+       (vqtbx4_s8): Use __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_xi one vector at a time.
+       (vqtbx4_u8): Likewise.
+       (vqtbx4_p8): Likewise.
+       (vqtbx4q_s8): Likewise.
+       (vqtbx4q_u8): Likewise.
+       (vqtbx4q_p8): Likewise.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * config/aarch64/arm_neon.h (vqtbl2_s8): Use __builtin_memcpy
+       instead of constructing __builtin_aarch64_simd_oi one vector
+       at a time.
+       (vqtbl2_u8): Likewise.
+       (vqtbl2_p8): Likewise.
+       (vqtbl2q_s8): Likewise.
+       (vqtbl2q_u8): Likewise.
+       (vqtbl2q_p8): Likewise.
+       (vqtbl3_s8): Use __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_ci one vector at a time.
+       (vqtbl3_u8): Likewise.
+       (vqtbl3_p8): Likewise.
+       (vqtbl3q_s8): Likewise.
+       (vqtbl3q_u8): Likewise.
+       (vqtbl3q_p8): Likewise.
+       (vqtbl4_s8): Use __builtin_memcpy instead of constructing
+       __builtin_aarch64_simd_xi one vector at a time.
+       (vqtbl4_u8): Likewise.
+       (vqtbl4_p8): Likewise.
+       (vqtbl4q_s8): Likewise.
+       (vqtbl4q_u8): Likewise.
+       (vqtbl4q_p8): Likewise.
+
+2021-07-23  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+       PR target/100952
+       * config/rs6000/rs6000.md (cstore<mode>4): Fix wrong fall through.
+
 2021-07-22  Andrew Pinski  <apinski@marvell.com>
 
        PR tree-optimization/10153
index dd601225256965b4b5a69d270982ddaaa38ad033..3b58862b6ce6c5c486e77c26bc798c1ea8c4ec03 100644 (file)
@@ -1 +1 @@
-20210723
+20210724
index 272bf15cc1627a1ecafdf23b5d22c12647f6f241..fd799e3ea02d4f90ad16a3f9a8cde64343cd01ce 100644 (file)
@@ -1,3 +1,19 @@
+2021-07-23  David Malcolm  <dmalcolm@redhat.com>
+
+       * diagnostic-manager.cc
+       (class auto_disable_complexity_checks): New.
+       (epath_finder::explore_feasible_paths): Use it to disable
+       complexity checks whilst processing the worklist.
+       * region-model-manager.cc
+       (region_model_manager::region_model_manager): Initialize
+       m_check_complexity.
+       (region_model_manager::reject_if_too_complex): Bail if
+       m_check_complexity is false.
+       * region-model.h
+       (region_model_manager::enable_complexity_check): New.
+       (region_model_manager::disable_complexity_check): New.
+       (region_model_manager::m_check_complexity): New.
+
 2021-07-21  David Malcolm  <dmalcolm@redhat.com>
 
        PR analyzer/101547
index 55f18d991f9ea87ad9d1b7a2aa298256aa8c0dc6..ce5d70dd45352b2e7bb9cf928ef36d2b7d301398 100644 (file)
@@ -1,3 +1,14 @@
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       * c-lex.c (c_common_has_attribute): Call canonicalize_attr_name also
+       on attr_id.  Return 1 for omp::directive or omp::sequence in C++11
+       and later.
+
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       * c-pragma.h (enum pragma_kind): Add PRAGMA_OMP__START_ and
+       PRAGMA_OMP__LAST_ enumerators.
+
 2021-07-21  Thomas Schwinge  <thomas@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Cesar Philippidis  <cesar@codesourcery.com>
index 37ea7f5c3abc97629253581282778439f89fccef..293f620b498bcbd522a2f9a63b27b60478d66371 100644 (file)
@@ -1,3 +1,19 @@
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       * parser.h (struct cp_parser): Add omp_attrs_forbidden_p member.
+       * parser.c (cp_parser_handle_statement_omp_attributes): Diagnose
+       mixing of attribute and pragma syntax directives when seeing
+       omp::directive if parser->omp_attrs_forbidden_p or if attribute syntax
+       directives are followed by OpenMP pragma.
+       (cp_parser_statement): Clear parser->omp_attrs_forbidden_p after
+       the cp_parser_handle_statement_omp_attributes call.
+       (cp_parser_omp_structured_block): Add disallow_omp_attrs argument,
+       if true, set parser->omp_attrs_forbidden_p.
+       (cp_parser_omp_scan_loop_body, cp_parser_omp_sections_scope): Pass
+       false as disallow_omp_attrs to cp_parser_omp_structured_block.
+       (cp_parser_omp_parallel, cp_parser_omp_task): Set
+       parser->omp_attrs_forbidden_p.
+
 2021-07-21  Thomas Schwinge  <thomas@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Cesar Philippidis  <cesar@codesourcery.com>
index 1c6aa03f1b7db6f2457ae103e5319f0fc0987bd8..e3bf9d685bbed342449582796daf9e7e8f9d578b 100644 (file)
@@ -1,3 +1,9 @@
+2021-07-23  Harald Anlauf  <anlauf@gmx.de>
+
+       PR fortran/101536
+       * check.c (array_check): Adjust check for the case of CLASS
+       arrays.
+
 2021-07-21  Thomas Schwinge  <thomas@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Cesar Philippidis  <cesar@codesourcery.com>
index 22ff279f7a9eaf2fe63710f035cf297dfc5b7664..681aefc2e1359365df81d09ccfdb76a7f1850723 100644 (file)
@@ -1,3 +1,85 @@
+2021-07-23  Harald Anlauf  <anlauf@gmx.de>
+
+       PR fortran/101536
+       * gfortran.dg/pr101536.f90: New test.
+
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       PR rtl-optimization/101562
+       * gcc.c-torture/compile/pr101562.c: New test.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/101504
+       * gcc.target/i386/pr101504.c: New test.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: Add new
+       tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: New tests.
+
+2021-07-23  Jonathan Wright  <jonathan.wright@arm.com>
+
+       * gcc.target/aarch64/vector_structure_intrinsics.c: New test.
+
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       * c-c++-common/gomp/attrs-1.c: New test.
+       * c-c++-common/gomp/attrs-2.c: New test.
+       * c-c++-common/gomp/attrs-3.c: New test.
+
+2021-07-23  Jakub Jelinek  <jakub@redhat.com>
+
+       * g++.dg/gomp/attrs-4.C: New test.
+       * g++.dg/gomp/attrs-5.C: New test.
+
+2021-07-23  Xi Ruoyao  <xry111@mengyan1223.wang>
+
+       * gcc.target/mips/mips.exp (mips_option_groups): add
+         -finline and -fno-inline.
+
+2021-07-23  Xi Ruoyao  <xry111@mengyan1223.wang>
+
+       Revert:
+       2021-07-09  Xi Ruoyao  <xry111@mengyan1223.wang>
+
+       * gcc.target/mips/cfgcleanup-jalr2.c: Remove -fno-inline and add
+         __attribute__((noinline)).
+       * gcc.target/mips/cfgcleanup-jalr3.c: Likewise.
+
+2021-07-23  David Malcolm  <dmalcolm@redhat.com>
+
+       * gcc.dg/analyzer/feasibility-3.c: New test.
+
 2021-07-22  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/65178
index 33c6d613a509e1f9bf60694a7464e8e517e768e8..01ca9394e879839cb2419de1e378b9c6f4b497bf 100644 (file)
@@ -1,3 +1,12 @@
+2021-07-23  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/std/future: Include <bits/atomic_base.h> instead of
+       <atomic>.
+
+2021-07-23  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/stl_relops.h: Update documentation comments.
+
 2021-07-22  Jonathan Wakely  <jwakely@redhat.com>
 
        PR libstdc++/101583