When assembling a forward reference the symbol will be unknown and so during
do_t_adr we cannot set the thumb bit. The bit it set so early to prevent
relaxations that are invalid. i.e. relaxing a Thumb2 to Thumb1 insn when the
symbol is Thumb.
But because it's done so early we miss the case for forward references.
This patch changes it so that we additionally check the thumb bit during the
internal relocation processing.
In principle we should be able to only set the bit during reloc processing but
that would require changes to the other relocations that the instruction could
be relaxed to.
This approach still allows early relaxations (which means that we have less
iteration of internal reloc processing) while still fixing the forward reference
case.
gas/ChangeLog:
2021-05-24 Tamar Christina <tamar.christina@arm.com>
PR gas/25235
* config/tc-arm.c (md_convert_frag): Set LSB when Thumb symbol.
(relax_adr): Thumb symbols 4 bytes.
* testsuite/gas/arm/pr25235.d: New test.
* testsuite/gas/arm/pr25235.s: New test.
(cherry picked from commit
d3e52e120b68bf19552743fbc078e0a759f48cb7)
pc_rel = (opcode == T_MNEM_ldr_pc2);
break;
case T_MNEM_adr:
+ /* Thumb bits should be set in the frag handling so we process them
+ after all symbols have been seen. PR gas/25235. */
+ if (exp.X_op == O_symbol
+ && exp.X_add_symbol != NULL
+ && S_IS_DEFINED (exp.X_add_symbol)
+ && THUMB_IS_FUNC (exp.X_add_symbol))
+ exp.X_add_number |= 1;
+
if (fragp->fr_var == 4)
{
insn = THUMB_OP32 (opcode);
if (fragp->fr_symbol == NULL
|| !S_IS_DEFINED (fragp->fr_symbol)
|| sec != S_GET_SEGMENT (fragp->fr_symbol)
- || S_IS_WEAK (fragp->fr_symbol))
+ || S_IS_WEAK (fragp->fr_symbol)
+ || THUMB_IS_FUNC (fragp->fr_symbol))
return 4;
val = relaxed_symbol_addr (fragp, stretch);
--- /dev/null
+#skip: *-*-pe *-*-wince *-*-vxworks
+#objdump: -dr
+#name: PR25235: Thumb forward references error
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+
+00000000 <f1>:
+ 0: 46c0 nop ; \(mov r8, r8\)
+ 2: 46c0 nop ; \(mov r8, r8\)
+
+00000004 <f2>:
+ 4: f2af 0107 subw r1, pc, #7
+ 8: f20f 0305 addw r3, pc, #5
+ c: a401 add r4, pc, #4 ; \(adr r4, 14 <f4>\)
+ e: 46c0 nop ; \(mov r8, r8\)
+
+00000010 <f3>:
+ 10: 46c0 nop ; \(mov r8, r8\)
+ 12: 46c0 nop ; \(mov r8, r8\)
+
+00000014 <f4>:
+ 14: e1a00000 nop ; \(mov r0, r0\)
--- /dev/null
+ .syntax unified
+ .thumb
+
+ .align 2
+ .type f1, %function
+ .thumb_func
+ f1:
+ nop
+
+ .align 2
+ .type f2, %function
+ .thumb_func
+ f2:
+ adr r1, f1
+ adr r3, f3
+ adr r4, f4
+
+
+ .align 2
+ .type f3, %function
+ .thumb_func
+ f3:
+ nop
+
+ .align 2
+ .type f3, %function
+ .arm
+ f4:
+ nop
+