4.4-stable patches

added patches:
	revert-mips-lantiq-fix-cascaded-irq-setup.patch

diff --git a/queue-4.4/revert-mips-lantiq-fix-cascaded-irq-setup.patch b/queue-4.4/revert-mips-lantiq-fix-cascaded-irq-setup.patch
new file mode 100644 (file)
index 0000000..779d79a
--- /dev/null
+++ b/queue-4.4/revert-mips-lantiq-fix-cascaded-irq-setup.patch
@@ -0,0 +1,90 @@
+From 4c65ebee999d93a378c442441b4d83f6b3805b63 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Tue, 18 Apr 2017 16:16:57 +0200
+Subject: Revert "MIPS: Lantiq: Fix cascaded IRQ setup"
+
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+This reverts commit 6280ac931a23d3fa40cd26057576abcf90a4f22d which is
+commit 6c356eda225e3ee134ed4176b9ae3a76f793f4dd upstream.
+
+It shouldn't have been included in a stable release.
+
+Reported-by: Amit Pundir <amit.pundir@linaro.org>
+Cc: Felix Fietkau <nbd@nbd.name>
+Cc: John Crispin <john@phrozen.org>
+Cc: James Hogan <james.hogan@imgtec.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/mips/lantiq/irq.c |   36 ++++++++++++++++++++----------------
+ 1 file changed, 20 insertions(+), 16 deletions(-)
+
+--- a/arch/mips/lantiq/irq.c
++++ b/arch/mips/lantiq/irq.c
+@@ -269,11 +269,6 @@ static void ltq_hw5_irqdispatch(void)
+ DEFINE_HWx_IRQDISPATCH(5)
+ #endif
+ 
+-static void ltq_hw_irq_handler(struct irq_desc *desc)
+-{
+-      ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
+-}
+-
+ #ifdef CONFIG_MIPS_MT_SMP
+ void __init arch_init_ipiirq(int irq, struct irqaction *action)
+ {
+@@ -318,19 +313,23 @@ static struct irqaction irq_call = {
+ asmlinkage void plat_irq_dispatch(void)
+ {
+       unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+-      int irq;
++      unsigned int i;
+ 
+-      if (!pending) {
+-              spurious_interrupt();
+-              return;
++      if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
++              do_IRQ(MIPS_CPU_TIMER_IRQ);
++              goto out;
++      } else {
++              for (i = 0; i < MAX_IM; i++) {
++                      if (pending & (CAUSEF_IP2 << i)) {
++                              ltq_hw_irqdispatch(i);
++                              goto out;
++                      }
++              }
+       }
++      pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
+ 
+-      pending >>= CAUSEB_IP;
+-      while (pending) {
+-              irq = fls(pending) - 1;
+-              do_IRQ(MIPS_CPU_IRQ_BASE + irq);
+-              pending &= ~BIT(irq);
+-      }
++out:
++      return;
+ }
+ 
+ static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+@@ -355,6 +354,11 @@ static const struct irq_domain_ops irq_d
+       .map = icu_map,
+ };
+ 
++static struct irqaction cascade = {
++      .handler = no_action,
++      .name = "cascade",
++};
++
+ int __init icu_of_init(struct device_node *node, struct device_node *parent)
+ {
+       struct device_node *eiu_node;
+@@ -386,7 +390,7 @@ int __init icu_of_init(struct device_nod
+       mips_cpu_irq_init();
+ 
+       for (i = 0; i < MAX_IM; i++)
+-              irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
++              setup_irq(i + 2, &cascade);
+ 
+       if (cpu_has_vint) {
+               pr_info("Setting up vectored interrupts\n");

diff --git a/queue-4.4/series b/queue-4.4/series
index c4c05fff35a131eb82c7666e2e18d6e76b4b9c04..88f8dc5a5a5e9d289d0b07b717a6730afcac861a 100644 (file)
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -21,3 +21,4 @@ irqchip-irq-imx-gpcv2-fix-spinlock-initialization.patch
 ftrace-fix-removing-of-second-function-probe.patch
 char-drop-bogus-dependency-of-devport-on-m68k.patch
 char-lack-of-bool-string-made-config_devport-always-on.patch
+revert-mips-lantiq-fix-cascaded-irq-setup.patch