Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

gcc/

	* config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
	"yes" where needed.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211899 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7979ff98feacddf2a9fb48686d139a075abd4501..32917ef5e4a574dd5c66ba970ba933d68c43c1ce 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
+       "yes" where needed.
+
 2014-06-23  Alan Modra  <amodra@gmail.com>
 
        PR bootstrap/61583

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 5f5b4ff89b64333cfa870e1673d6f97753df938a..8705ee9d1892882af70b2a528d0007d3013a135b 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1167,7 +1167,8 @@
   add\\t%w0, %w1, %w2
   add\\t%0.2s, %1.2s, %2.2s
   sub\\t%w0, %w1, #%n2"
-  [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm")]
+  [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm")
+   (set_attr "simd" "*,*,yes,*")]
 )
 
 ;; zero_extend version of above