#define AMDGPU_PTE_PRT_FLAG(adev) \
((amdgpu_ip_version((adev), GC_HWIP, 0) >= IP_VERSION(12, 0, 0)) ? AMDGPU_PTE_PRT_GFX12 : AMDGPU_PTE_PRT)
-#define AMDGPU_PTE_MTYPE_GFX12(a) ((uint64_t)(a) << 54)
-#define AMDGPU_PTE_MTYPE_GFX12_MASK AMDGPU_PTE_MTYPE_GFX12(3ULL)
+#define AMDGPU_PTE_MTYPE_GFX12_SHIFT(mtype) ((uint64_t)(mtype) << 54)
+#define AMDGPU_PTE_MTYPE_GFX12_MASK AMDGPU_PTE_MTYPE_GFX12_SHIFT(3ULL)
+#define AMDGPU_PTE_MTYPE_GFX12(flags, mtype) \
+ (((uint64_t)(flags) & (~AMDGPU_PTE_MTYPE_GFX12_MASK)) | \
+ AMDGPU_PTE_MTYPE_GFX12_SHIFT(mtype))
#define AMDGPU_PTE_IS_PTE (1ULL << 63)
{
switch (flags) {
case AMDGPU_VM_MTYPE_DEFAULT:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_NC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_NC);
case AMDGPU_VM_MTYPE_NC:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_NC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_NC);
case AMDGPU_VM_MTYPE_WC:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_WC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_WC);
case AMDGPU_VM_MTYPE_CC:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_CC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_CC);
case AMDGPU_VM_MTYPE_UC:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_UC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_UC);
default:
- return AMDGPU_PTE_MTYPE_GFX12(MTYPE_NC);
+ return AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_NC);
}
}
if (bo->flags & (AMDGPU_GEM_CREATE_COHERENT |
AMDGPU_GEM_CREATE_UNCACHED))
- *flags = (*flags & ~AMDGPU_PTE_MTYPE_GFX12_MASK) |
- AMDGPU_PTE_MTYPE_GFX12(MTYPE_UC);
+ *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC);
bo_adev = amdgpu_ttm_adev(bo->tbo.bdev);
coherent = bo->flags & AMDGPU_GEM_CREATE_COHERENT;
/* WA for HW bug */
if (is_system || ((bo_adev != adev) && coherent))
- *flags |= AMDGPU_PTE_MTYPE_GFX12(MTYPE_NC);
+ *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_NC);
}
return r;
adev->gart.table_size = adev->gart.num_gpu_pages * 8;
- adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_GFX12(MTYPE_UC) |
+ adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_GFX12(0ULL, MTYPE_UC) |
AMDGPU_PTE_EXECUTABLE |
AMDGPU_PTE_IS_PTE;