Daily bump.

diff --git a/ChangeLog b/ChangeLog
index bdd1e5e34242241b0946fbc553679b1e8d0b1491..201193fee8c0ad7ee75dc6beaf6b37bb9df7e60c 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,35 @@
+2024-06-19  YunQiang Su  <syq@gcc.gnu.org>
+
+       Revert:
+       2024-06-19  Collin Funk  <collin.funk1@gmail.com>
+
+       * configure.ac: Quote variable result of AC_SEARCH_LIBS.
+       * configure: Regenerate.
+
+2024-06-19  YunQiang Su  <syq@gcc.gnu.org>
+
+       Revert:
+       2024-06-19  YunQiang Su  <syq@gcc.gnu.org>
+
+       PR bootstrap/115453
+       * configure.ac: Fix typo ac_cv_search_pthread_crate.
+       * configure: Regnerate.
+
+2024-06-19  YunQiang Su  <syq@gcc.gnu.org>
+
+       PR bootstrap/115453
+       * configure.ac: Fix typo ac_cv_search_pthread_crate.
+       * configure: Regnerate.
+
+2024-06-19  Collin Funk  <collin.funk1@gmail.com>
+
+       * configure.ac: Quote variable result of AC_SEARCH_LIBS.
+       * configure: Regenerate.
+
+2024-06-19  Ramana Radhakrishnan  <ramanara@nvidia.com>
+
+       * MAINTAINERS: Update my email address.
+
 2024-06-18  Kyrylo Tkachov  <ktkachov@nvidia.com>
 
        * MAINTAINERS (aarch64 port): Update my email address.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d64a751a55ea5020caba32499b4502bf93bc33cb..8610e76b07b306b06ccf09d0967ed28933e06d73 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,143 @@
+2024-06-19  YunQiang Su  <syq@gcc.gnu.org>
+
+       Revert:
+       2024-06-19  Collin Funk  <collin.funk1@gmail.com>
+
+       * configure.ac: Add missing quotation of variable
+       gcc_cv_as_mips_explicit_relocs.
+       * configure: Regenerate.
+
+2024-06-19  demin.han  <demin.han@starfivetech.com>
+
+       * config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond
+       * config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove patterns
+       (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto
+       (*pred_eqne<mode>_scalar): Ditto
+       (*pred_eqne<mode>_scalar_narrow): Ditto
+
+2024-06-19  Patrick O'Neill  <patrick@rivosinc.com>
+
+       * common/config/riscv/riscv-common.cc: Add 'a' extension to
+       riscv_combine_info.
+
+2024-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+       PR tree-optimization/115544
+       * gimple-lower-bitint.cc (gimple_lower_bitint): Disable optimizing
+       loads used by COMPLEX_EXPR operands.
+
+2024-06-19  mayshao  <mayshao-oc@zhaoxin.com>
+
+       * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize shijidadao.
+       * common/config/i386/i386-common.cc: Add shijidadao.
+       * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
+       Add ZHAOXIN_FAM7H_SHIJIDADAO.
+       * config.gcc: Add shijidadao.
+       * config/i386/driver-i386.cc (host_detect_local_cpu):
+       Let -march=native recognize shijidadao processors.
+       * config/i386/i386-c.cc (ix86_target_macros_internal): Add shijidadao.
+       * config/i386/i386-options.cc (m_ZHAOXIN): Add m_SHIJIDADAO.
+       (m_SHIJIDADAO): New definition.
+       * config/i386/i386.h (enum processor_type): Add PROCESSOR_SHIJIDADAO.
+       * config/i386/x86-tune-costs.h (struct processor_costs):
+       Add shijidadao_cost.
+       * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add shijidadao.
+       (ix86_adjust_cost): Ditto.
+       * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Add m_SHIJIDADAO.
+       (X86_TUNE_USE_GATHER_4PARTS): Ditto.
+       (X86_TUNE_USE_GATHER_8PARTS): Ditto.
+       (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
+       * doc/extend.texi: Add details about shijidadao.
+       * doc/invoke.texi: Ditto.
+
+2024-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa.cc (print_operand):
+       When outputting MEMW before the instruction, check if the previous
+       instruction is already that.
+
+2024-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+           Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+
+       * config/arm/arm-protos.h (arm_target_bb_ok_for_lob): Change
+       declaration to pass basic_block.
+       (arm_attempt_dlstp_transform): New declaration.
+       * config/arm/arm.cc (TARGET_LOOP_UNROLL_ADJUST): Define targethook.
+       (TARGET_PREDICT_DOLOOP_P): Likewise.
+       (arm_target_bb_ok_for_lob): Adapt condition.
+       (arm_mve_get_vctp_lanes): New function.
+       (arm_dl_usage_type): New internal enum.
+       (arm_get_required_vpr_reg): New function.
+       (arm_get_required_vpr_reg_param): New function.
+       (arm_get_required_vpr_reg_ret_val): New function.
+       (arm_mve_get_loop_vctp): New function.
+       (arm_mve_insn_predicated_by): New function.
+       (arm_mve_across_lane_insn_p): New function.
+       (arm_mve_load_store_insn_p): New function.
+       (arm_mve_impl_pred_on_outputs_p): New function.
+       (arm_mve_impl_pred_on_inputs_p): New function.
+       (arm_last_vect_def_insn): New function.
+       (arm_mve_impl_predicated_p): New function.
+       (arm_mve_check_reg_origin_is_num_elems): New function.
+       (arm_mve_dlstp_check_inc_counter): New function.
+       (arm_mve_dlstp_check_dec_counter): New function.
+       (arm_mve_loop_valid_for_dlstp): New function.
+       (arm_predict_doloop_p): New function.
+       (arm_loop_unroll_adjust): New function.
+       (arm_emit_mve_unpredicated_insn_to_seq): New function.
+       (arm_attempt_dlstp_transform): New function.
+       * config/arm/arm.opt (mdlstp): New option.
+       * config/arm/iterators.md (dlstp_elemsize, letp_num_lanes,
+       letp_num_lanes_neg, letp_num_lanes_minus_1): New attributes.
+       (DLSTP, LETP): New iterators.
+       * config/arm/mve.md (predicated_doloop_end_internal<letp_num_lanes>,
+       dlstp<dlstp_elemsize>_insn): New insn patterns.
+       * config/arm/thumb2.md (doloop_end): Adapt to support tail-predicated
+       loops.
+       (doloop_begin): Likewise.
+       * config/arm/types.md (mve_misc): New mve type to represent
+       predicated_loop_end insn sequences.
+       * config/arm/unspecs.md:
+       (DLSTP8, DLSTP16, DLSTP32, DSLTP64,
+       LETP8, LETP16, LETP32, LETP64): New unspecs for DLSTP and LETP.
+
+2024-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+           Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+
+       * df-core.cc (df_bb_regno_only_def_find): New helper function.
+       * df.h (df_bb_regno_only_def_find): Declare new function.
+       * loop-doloop.cc (doloop_condition_get): Add support for detecting
+       predicated vectorized hardware loops.
+       (doloop_modify): Add support for GTU condition checks.
+       (doloop_optimize): Update costing computation to support alterations to
+       desc->niter_expr by the backend.
+
+2024-06-19  Collin Funk  <collin.funk1@gmail.com>
+
+       * configure.ac: Add missing quotation of variable
+       gcc_cv_as_mips_explicit_relocs.
+       * configure: Regenerate.
+
+2024-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+
+       * config/xtensa/xtensa-protos.h (xtensa_constantsynth):
+       Change the second argument from HOST_WIDE_INT to rtx.
+       * config/xtensa/xtensa.cc (#include):
+       Add "context.h" and "pass_manager.h".
+       (machine_function): Add a new hash_map field "litpool_usage".
+       (xtensa_constantsynth): Make "src" (the second operand) accept
+       RTX literal instead of its value, and treat both bare and pooled
+       SI/SFmode literals equally by bit-exact canonicalization into
+       CONST_INT RTX internally.  And then, make avoid synthesis if
+       such multiple identical canonicalized literals are found in same
+       function when optimizing for size.  Finally, for literals where
+       synthesis is not possible or has been avoided, re-emit "move"
+       RTXes with canonicalized ones to increase the chances of sharing
+       literal pool entries.
+       * config/xtensa/xtensa.md (split patterns for constant synthesis):
+       Change to simply invoke xtensa_constantsynth() as mentioned above,
+       and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.
+
 2024-06-18  Edwin Lu  <ewlu@rivosinc.com>
            Robin Dapp  <rdapp@ventanamicro.com>
 

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6fe37f7c38677830c80b1e16ce6c01939193cb25..9df1831b6e340c4e73496c5affeadb4156542097 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240619
+20240620

diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index a2275728a46b90ec71063abfbd717b7089f1ea88..8fcd6d40c956cca55d6d6c91a5531a0a15438d66 100644 (file)
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,19 @@
+2024-06-19  Harald Anlauf  <anlauf@gmx.de>
+
+       PR fortran/115390
+       * trans-decl.cc (gfc_conv_cfi_to_gfc): Move derivation of type sizes
+       for character via gfc_trans_vla_type_sizes to after character length
+       has been set.
+
+2024-06-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+       PR fortran/90076
+       * trans-decl.cc (gfc_generate_function_code): Set vptr for
+       results to declared class type.
+       * trans-expr.cc (gfc_reset_vptr): Allow to provide the typespec
+       instead of the expression.
+       * trans.h (gfc_reset_vptr): Same.
+
 2024-06-17  Andre Vehreschild  <vehre@gcc.gnu.org>
 
        * trans.cc (gfc_deallocate_with_status): Check that object to deref

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2ae5731931d92b18b710f9c27316d4f3123b8dfb..69e269330d9f1a53e4c0c1a674c695e97c2d48ce 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,264 @@
+2024-06-19  demin.han  <demin.han@starfivetech.com>
+
+       * gcc.target/riscv/rvv/base/float-point-cmp-eqne.c: New test.
+
+2024-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+       PR tree-optimization/115544
+       * gcc.dg/bitint-107.c: New test.
+
+2024-06-19  mayshao  <mayshao-oc@zhaoxin.com>
+
+       * g++.target/i386/mv32.C: Handle new -march
+       * gcc.target/i386/funcspec-56.inc: Ditto.
+
+2024-06-19  Harald Anlauf  <anlauf@gmx.de>
+
+       PR fortran/115390
+       * gfortran.dg/bind_c_char_11.f90: New test.
+
+2024-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+           Stam Markianos-Wright  <stam.markianos-wright@arm.com>
+
+       * gcc.target/arm/lob.h: Add new helpers.
+       * gcc.target/arm/lob1.c: Use new helpers.
+       * gcc.target/arm/lob6.c: Likewise.
+       * gcc.target/arm/mve/dlstp-compile-asm-1.c: New test.
+       * gcc.target/arm/mve/dlstp-compile-asm-2.c: New test.
+       * gcc.target/arm/mve/dlstp-compile-asm-3.c: New test.
+       * gcc.target/arm/mve/dlstp-int8x16.c: New test.
+       * gcc.target/arm/mve/dlstp-int8x16-run.c: New test.
+       * gcc.target/arm/mve/dlstp-int16x8.c: New test.
+       * gcc.target/arm/mve/dlstp-int16x8-run.c: New test.
+       * gcc.target/arm/mve/dlstp-int32x4.c: New test.
+       * gcc.target/arm/mve/dlstp-int32x4-run.c: New test.
+       * gcc.target/arm/mve/dlstp-int64x2.c: New test.
+       * gcc.target/arm/mve/dlstp-int64x2-run.c: New test.
+       * gcc.target/arm/mve/dlstp-invalid-asm.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-37.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-38.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-39.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-40.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-33.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-34.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-35.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-36.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-29.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-30.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-31.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-32.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-29.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-30.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-31.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-32.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-25.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-26.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-27.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-28.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-25.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-26.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-27.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-28.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-21.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-22.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-23.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-24.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-17.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-18.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-19.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-20.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-13.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-14.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-15.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-16.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-10.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-11.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-12.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-9.c: New test.
+
+2024-06-19  Richard Biener  <rguenther@suse.de>
+
+       * gcc.dg/vect/bb-slp-32.c: Add check for correctness.
+
+2024-06-19  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+       PR fortran/90076
+       * gfortran.dg/class_76.f90: Add declared vtab occurrence.
+       * gfortran.dg/class_78.f90: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-29.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-30.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-31.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-32.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-25.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-26.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-27.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-28.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-21.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-22.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-23.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-24.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-17.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-18.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-19.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-20.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-13.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-14.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-15.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-16.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-10.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-11.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-12.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-9.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-10.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-11.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-12.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-9.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-5.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-6.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-7.c: New test.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-8.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/sat_arith.h: Add helper macro for
+       testing.
+       * gcc.target/riscv/sat_u_sub-45.c: New test.
+       * gcc.target/riscv/sat_u_sub-46.c: New test.
+       * gcc.target/riscv/sat_u_sub-47.c: New test.
+       * gcc.target/riscv/sat_u_sub-48.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-45.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-46.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-47.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-48.c: New test.
+
+2024-06-19  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/sat_arith.h: Add helper
+       macro for testing.
+       * gcc.target/riscv/sat_u_sub-41.c: New test.
+       * gcc.target/riscv/sat_u_sub-42.c: New test.
+       * gcc.target/riscv/sat_u_sub-43.c: New test.
+       * gcc.target/riscv/sat_u_sub-44.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-41.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-42.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-43.c: New test.
+       * gcc.target/riscv/sat_u_sub-run-44.c: New test.
+
 2024-06-18  Jeff Law  <jlaw@ventanamicro.com>
 
        * gcc.target/riscv/zbs-ext-2.c: Do not run for -Os.

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 907f6cfb0e83c23e7b3952632b9f2aeeb75c60c4..94a5ce9a1329cec9104a0aab5b3db80a71817326 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,27 @@
+2024-06-19  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/std/future: Adjust whitespace to use tabs for
+       indentation.
+
+2024-06-19  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/std/future (_State_baseV2::_Setter<R, void>): Add
+       noexcept to call operator.
+       (_State_baseV2::_Setter<R, __exception_ptr_tag>): Likewise.
+
+2024-06-19  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/stl_pair.h [__cpp_lib_concepts] (pair()): Add
+       conditional noexcept.
+
+2024-06-19  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/stl_tempbuf.h (__get_temporary_buffer): Cast
+       argument to size_t to handle negative values and suppress
+       -Wsign-compare warning.
+       (_Temporary_buffer): Move diagnostic pragmas to new location of
+       call to std::get_temporary_buffer.
+
 2024-06-18  Jonathan Wakely  <jwakely@redhat.com>
 
        * include/bits/cpp_type_traits.h: Fix outdated comment about the