Force 32-bit displacement in memset-vec-unaligned-erms.S

	* sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S: Force
	32-bit displacement to avoid long nop between instructions.

diff --git a/ChangeLog b/ChangeLog
index 4b2f408e89241e6e87798c252c9f5fc929d602b7..048299a45e109fd54d01bc7aef57e0393fed9061 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2016-04-05   H.J. Lu  <hongjiu.lu@intel.com>
+
+       * sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S: Force
+       32-bit displacement to avoid long nop between instructions.
+
 2016-04-05   H.J. Lu  <hongjiu.lu@intel.com>
 
        * sysdeps/x86_64/multiarch/memset-sse2-unaligned-erms.S: Add

diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
index 93835175367490038f92e428b3d26338d742fb43..fe0f74516d3e5e328acfa497791bbd3a1995dbbe 100644 (file)
--- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
+++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
@@ -159,10 +159,23 @@ L(return):
        .p2align 4
 L(loop_start):
        leaq    (VEC_SIZE * 4)(%rdi), %rcx
+# if VEC_SIZE == 32 || VEC_SIZE == 64
+       /* Force 32-bit displacement to avoid long nop between
+          instructions.  */
+       VMOVU.d32 %VEC(0), (%rdi)
+# else
        VMOVU   %VEC(0), (%rdi)
+# endif
        andq    $-(VEC_SIZE * 4), %rcx
+# if VEC_SIZE == 32
+       /* Force 32-bit displacement to avoid long nop between
+          instructions.  */
+       VMOVU.d32 %VEC(0), -VEC_SIZE(%rdi,%rdx)
+       VMOVU.d32 %VEC(0), VEC_SIZE(%rdi)
+# else
        VMOVU   %VEC(0), -VEC_SIZE(%rdi,%rdx)
        VMOVU   %VEC(0), VEC_SIZE(%rdi)
+# endif
        VMOVU   %VEC(0), -(VEC_SIZE * 2)(%rdi,%rdx)
        VMOVU   %VEC(0), (VEC_SIZE * 2)(%rdi)
        VMOVU   %VEC(0), -(VEC_SIZE * 3)(%rdi,%rdx)