iio: adc: ad4030: add support for ad4632-16 and ad4632-24

AD4632-24 and AD4632-16 are 2 channels ADCs. Both channels are
interleaved bit per bit on SDO line.

Both of them do not have evaluation board. As such, the support added
here can't be tested. Support is provided as best effort until someone get
their hands on one.

Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Link: https://patch.msgid.link/20250214-eblanc-ad4630_v1-v4-5-135dd66cab6a@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/adc/ad4030.c b/drivers/iio/adc/ad4030.c
index 0fdf01d6d7f30dbe375a52eb82b41124721d3bee..ab5497c8ea1ea82df32df8d90701e7bce9eecc20 100644 (file)
--- a/drivers/iio/adc/ad4030.c
+++ b/drivers/iio/adc/ad4030.c
@@ -35,6 +35,8 @@
 #define     AD4030_REG_CHIP_GRADE_AD4030_24_GRADE      0x10
 #define     AD4030_REG_CHIP_GRADE_AD4630_16_GRADE      0x03
 #define     AD4030_REG_CHIP_GRADE_AD4630_24_GRADE      0x00
+#define     AD4030_REG_CHIP_GRADE_AD4632_16_GRADE      0x05
+#define     AD4030_REG_CHIP_GRADE_AD4632_24_GRADE      0x02
 #define     AD4030_REG_CHIP_GRADE_MASK_CHIP_GRADE      GENMASK(7, 3)
 #define AD4030_REG_SCRATCH_PAD                 0x0A
 #define AD4030_REG_SPI_REVISION                        0x0B
@@ -106,6 +108,9 @@
 #define AD4030_TCYC_NS                 500
 #define AD4030_TCYC_ADJUSTED_NS                (AD4030_TCYC_NS - AD4030_TCNVL_NS)
 #define AD4030_TRESET_PW_NS            50
+#define AD4632_TCYC_NS                 2000
+#define AD4632_TCYC_ADJUSTED_NS                (AD4632_TCYC_NS - AD4030_TCNVL_NS)
+#define AD4030_TRESET_COM_DELAY_MS     750
 
 enum ad4030_out_mode {
        AD4030_OUT_DATA_MD_DIFF,
@@ -1161,10 +1166,44 @@ static const struct ad4030_chip_info ad4630_24_chip_info = {
        .tcyc_ns = AD4030_TCYC_ADJUSTED_NS,
 };
 
+static const struct ad4030_chip_info ad4632_16_chip_info = {
+       .name = "ad4632-16",
+       .available_masks = ad4630_channel_masks,
+       .channels = {
+               AD4030_CHAN_DIFF(0, ad4030_16_scan_types),
+               AD4030_CHAN_DIFF(1, ad4030_16_scan_types),
+               AD4030_CHAN_CMO(2, 0),
+               AD4030_CHAN_CMO(3, 1),
+               IIO_CHAN_SOFT_TIMESTAMP(4),
+       },
+       .grade = AD4030_REG_CHIP_GRADE_AD4632_16_GRADE,
+       .precision_bits = 16,
+       .num_voltage_inputs = 2,
+       .tcyc_ns = AD4632_TCYC_ADJUSTED_NS,
+};
+
+static const struct ad4030_chip_info ad4632_24_chip_info = {
+       .name = "ad4632-24",
+       .available_masks = ad4630_channel_masks,
+       .channels = {
+               AD4030_CHAN_DIFF(0, ad4030_24_scan_types),
+               AD4030_CHAN_DIFF(1, ad4030_24_scan_types),
+               AD4030_CHAN_CMO(2, 0),
+               AD4030_CHAN_CMO(3, 1),
+               IIO_CHAN_SOFT_TIMESTAMP(4),
+       },
+       .grade = AD4030_REG_CHIP_GRADE_AD4632_24_GRADE,
+       .precision_bits = 24,
+       .num_voltage_inputs = 2,
+       .tcyc_ns = AD4632_TCYC_ADJUSTED_NS,
+};
+
 static const struct spi_device_id ad4030_id_table[] = {
        { "ad4030-24", (kernel_ulong_t)&ad4030_24_chip_info },
        { "ad4630-16", (kernel_ulong_t)&ad4630_16_chip_info },
        { "ad4630-24", (kernel_ulong_t)&ad4630_24_chip_info },
+       { "ad4632-16", (kernel_ulong_t)&ad4632_16_chip_info },
+       { "ad4632-24", (kernel_ulong_t)&ad4632_24_chip_info },
        { }
 };
 MODULE_DEVICE_TABLE(spi, ad4030_id_table);
@@ -1173,6 +1212,8 @@ static const struct of_device_id ad4030_of_match[] = {
        { .compatible = "adi,ad4030-24", .data = &ad4030_24_chip_info },
        { .compatible = "adi,ad4630-16", .data = &ad4630_16_chip_info },
        { .compatible = "adi,ad4630-24", .data = &ad4630_24_chip_info },
+       { .compatible = "adi,ad4632-16", .data = &ad4632_16_chip_info },
+       { .compatible = "adi,ad4632-24", .data = &ad4632_24_chip_info },
        { }
 };
 MODULE_DEVICE_TABLE(of, ad4030_of_match);