]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: x1e80100: Add UART2
authorKonrad Dybcio <quic_kdybcio@quicinc.com>
Mon, 26 Aug 2024 14:37:53 +0000 (16:37 +0200)
committerBjorn Andersson <andersson@kernel.org>
Mon, 26 Aug 2024 16:29:29 +0000 (11:29 -0500)
GENI SE2 within QUP0 is used as UART on some devices, describe it.
While at it, rewrite the adjacent UART21 pins node to make it more
easily modifiable.

Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Link: https://lore.kernel.org/r/20240826-topic-sl7-v2-4-c32ebae78789@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/x1e80100.dtsi

index 3011ee55ddf33e11345dea4abc836354d524b2f5..2bdd1e2a86f74fb47d265c76e707bf0cea5b3162 100644 (file)
                                status = "disabled";
                        };
 
+                       uart2: serial@b88000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0 0x00b88000 0 0x4000>;
+
+                               interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+                               clock-names = "se";
+
+                               interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
+                                                &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+                                                &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
+
+                               pinctrl-0 = <&qup_uart2_default>;
+                               pinctrl-names = "default";
+
+                               status = "disabled";
+                       };
+
                        spi2: spi@b88000 {
                                compatible = "qcom,geni-spi";
                                reg = <0 0x00b88000 0 0x4000>;
                                bias-disable;
                        };
 
+                       qup_uart2_default: qup-uart2-default-state {
+                               cts-pins {
+                                       pins = "gpio8";
+                                       function = "qup0_se2";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               rts-pins {
+                                       pins = "gpio9";
+                                       function = "qup0_se2";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               tx-pins {
+                                       pins = "gpio10";
+                                       function = "qup0_se2";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               rx-pins {
+                                       pins = "gpio11";
+                                       function = "qup0_se2";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+                       };
+
                        qup_uart21_default: qup-uart21-default-state {
-                               /* TX, RX */
-                               pins = "gpio86", "gpio87";
-                               function = "qup2_se5";
-                               drive-strength = <2>;
-                               bias-disable;
+                               tx-pins {
+                                       pins = "gpio86";
+                                       function = "qup2_se5";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
+
+                               rx-pins {
+                                       pins = "gpio87";
+                                       function = "qup2_se5";
+                                       drive-strength = <2>;
+                                       bias-disable;
+                               };
                        };
                };