]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
dt-bindings: interrupt-controller: aspeed: Add AST2700 SCU IC compatibles
authorRyan Chen <ryan_chen@aspeedtech.com>
Mon, 8 Sep 2025 01:18:11 +0000 (09:18 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Tue, 9 Sep 2025 10:23:28 +0000 (12:23 +0200)
Add compatible strings for the four SCU interrupt controller instances
on the AST2700 SoC (scu-ic0 to 3), following the multi-instance model used
on AST2600.

Also define interrupt indices in the binding header.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/all/20250908011812.1033858-4-ryan_chen@aspeedtech.com
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml
include/dt-bindings/interrupt-controller/aspeed-scu-ic.h

index d5287a2bf866bb69c069691a62159dc5281f1724..d998a9d69b91f427fd6bd72ec97273cae635b2b8 100644 (file)
@@ -5,7 +5,7 @@
 $id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2500-scu-ic.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Aspeed AST25XX and AST26XX SCU Interrupt Controller
+title: Aspeed AST25XX, AST26XX, AST27XX SCU Interrupt Controller
 
 maintainers:
   - Eddie James <eajames@linux.ibm.com>
@@ -16,6 +16,10 @@ properties:
       - aspeed,ast2500-scu-ic
       - aspeed,ast2600-scu-ic0
       - aspeed,ast2600-scu-ic1
+      - aspeed,ast2700-scu-ic0
+      - aspeed,ast2700-scu-ic1
+      - aspeed,ast2700-scu-ic2
+      - aspeed,ast2700-scu-ic3
 
   reg:
     maxItems: 1
index f315d5a7f5eef7c2f02843550c971775e2d85050..7dd04424afcce8095db7b6d3fd4ab36dfc5d1dfd 100644 (file)
 #define ASPEED_AST2600_SCU_IC1_LPC_RESET_LO_TO_HI      0
 #define ASPEED_AST2600_SCU_IC1_LPC_RESET_HI_TO_LO      1
 
+#define ASPEED_AST2700_SCU_IC0_PCIE_PERST_LO_TO_HI     3
+#define ASPEED_AST2700_SCU_IC0_PCIE_PERST_HI_TO_LO     2
+
+#define ASPEED_AST2700_SCU_IC1_PCIE_RCRST_LO_TO_HI     3
+#define ASPEED_AST2700_SCU_IC1_PCIE_RCRST_HI_TO_LO     2
+
+#define ASPEED_AST2700_SCU_IC2_PCIE_PERST_LO_TO_HI     3
+#define ASPEED_AST2700_SCU_IC2_PCIE_PERST_HI_TO_LO     2
+#define ASPEED_AST2700_SCU_IC2_LPC_RESET_LO_TO_HI      1
+#define ASPEED_AST2700_SCU_IC2_LPC_RESET_HI_TO_LO      0
+
+#define ASPEED_AST2700_SCU_IC3_LPC_RESET_LO_TO_HI      1
+#define ASPEED_AST2700_SCU_IC3_LPC_RESET_HI_TO_LO      0
+
 #endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_ */