]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
board: asus: tf600t: configure SPI pinmux
authorSvyatoslav Ryhel <clamor95@gmail.com>
Wed, 17 Jan 2024 16:32:21 +0000 (18:32 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Mon, 22 Apr 2024 09:17:20 +0000 (12:17 +0300)
Unlike all other transformers, TF600T has an SPI flash to store
boot firmware and requires precise SPI pinmux configuration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/dts/tegra30-asus-tf600t.dts

index f49e7341fe0b2a20d9b3fd9588aca7ff40c0e617..86ad925921f456fd819cc9936a8f87b321a1b8a5 100644 (file)
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };
 
+                       /* SPI pinmux */
+                       spi1_ctrl {
+                               nvidia,pins = "spi1_mosi_px4",
+                                               "spi1_sck_px5",
+                                               "spi1_cs0_n_px6",
+                                               "spi1_miso_px7";
+                               nvidia,function = "spi1";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_ENABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       spi2_sck {
+                               nvidia,pins = "spi2_sck_px2";
+                               nvidia,function = "gmi";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       spi2_cs1_n {
+                               nvidia,pins = "spi2_cs1_n_pw2";
+                               nvidia,function = "spi2";
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+                       spi4_ctrl {
+                               nvidia,pins = "gmi_a16_pj7",
+                                               "gmi_a17_pb0",
+                                               "gmi_a18_pb1",
+                                               "gmi_a19_pk7";
+                               nvidia,function = "spi4";
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
+                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                       };
+
                        /* Display A pinmux */
                        lcd_pwr0_pb2 {
                                nvidia,pins = "lcd_pwr0_pb2",