}
uiout->table_header (3, ui_left, "min-prot", "Min");
uiout->table_header (3, ui_left, "max-prot", "Max");
- uiout->table_header (5, ui_left, "inheritence", "Inh");
+ uiout->table_header (5, ui_left, "inheritance", "Inh");
uiout->table_header (9, ui_left, "share-mode", "Shr");
uiout->table_header (1, ui_left, "depth", "D");
uiout->table_header (3, ui_left, "submap", "Sm");
unparse_protection (r_info.protection));
uiout->field_string ("max-prot",
unparse_protection (r_info.max_protection));
- uiout->field_string ("inheritence",
+ uiout->field_string ("inheritance",
unparse_inheritance (r_info.inheritance));
uiout->field_string ("share-mode",
unparse_share_mode (r_info.share_mode));
#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_names)
/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
- registers as "psuedo" registers. */
+ registers as "pseudo" registers. */
static const char * const sparc64_pseudo_register_names[] =
{