PCI: cadence: Add Power Management ops for host and EP

These PM ops will enable/disable the optional PHYs if present.  The
AXI link-down register in the host driver is now cleared in
cdns_pci_map_bus() since the link-down bit will be set if the PHY has
been disabled. It is not cleared when enabling the PHY, since the
link will not yet be up (e.g. when an EP controller is connected
back-to-back to the host controller and its PHY is still disabled).

Link: http://lkml.kernel.org/r/1529915453-4633-5-git-send-email-adouglas@cadence.com
Signed-off-by: Alan Douglas <adouglas@cadence.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

diff --git a/drivers/pci/controller/pcie-cadence-ep.c b/drivers/pci/controller/pcie-cadence-ep.c
index c02f33d8e5062fb4702a2c935854435b6e2d35c2..3eabd99a1233f290cfe312cb3521a34d9c416060 100644 (file)
--- a/drivers/pci/controller/pcie-cadence-ep.c
+++ b/drivers/pci/controller/pcie-cadence-ep.c
@@ -555,6 +555,7 @@ static struct platform_driver cdns_pcie_ep_driver = {
        .driver = {
                .name = "cdns-pcie-ep",
                .of_match_table = cdns_pcie_ep_of_match,
+               .pm     = &cdns_pcie_pm_ops,
        },
        .probe = cdns_pcie_ep_probe,
        .shutdown = cdns_pcie_ep_shutdown,

diff --git a/drivers/pci/controller/pcie-cadence-host.c b/drivers/pci/controller/pcie-cadence-host.c
index 36f31092562f024af08be02f13c33a76925481ca..e3e9b7de85920186d004d52ddbc0d9fd268abae7 100644 (file)
--- a/drivers/pci/controller/pcie-cadence-host.c
+++ b/drivers/pci/controller/pcie-cadence-host.c
@@ -61,6 +61,8 @@ static void __iomem *cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
        /* Check that the link is up */
        if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1))
                return NULL;
+       /* Clear AXI link-down status */
+       cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0);
 
        /* Update Output registers for AXI region 0. */
        addr0 = CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS(12) |
@@ -345,6 +347,7 @@ static struct platform_driver cdns_pcie_host_driver = {
        .driver = {
                .name = "cdns-pcie-host",
                .of_match_table = cdns_pcie_host_of_match,
+               .pm     = &cdns_pcie_pm_ops,
        },
        .probe = cdns_pcie_host_probe,
 };

diff --git a/drivers/pci/controller/pcie-cadence.c b/drivers/pci/controller/pcie-cadence.c
index 2edc12661e44795bc620bb6728b2fd8888211ceb..86f1b002c846a395ca7c93bcc5866ab0fe3aa374 100644 (file)
--- a/drivers/pci/controller/pcie-cadence.c
+++ b/drivers/pci/controller/pcie-cadence.c
@@ -217,3 +217,33 @@ err_link:
 
        return ret;
 }
+
+#ifdef CONFIG_PM_SLEEP
+static int cdns_pcie_suspend_noirq(struct device *dev)
+{
+       struct cdns_pcie *pcie = dev_get_drvdata(dev);
+
+       cdns_pcie_disable_phy(pcie);
+
+       return 0;
+}
+
+static int cdns_pcie_resume_noirq(struct device *dev)
+{
+       struct cdns_pcie *pcie = dev_get_drvdata(dev);
+       int ret;
+
+       ret = cdns_pcie_enable_phy(pcie);
+       if (ret) {
+               dev_err(dev, "failed to enable phy\n");
+               return ret;
+       }
+
+       return 0;
+}
+#endif
+
+const struct dev_pm_ops cdns_pcie_pm_ops = {
+       SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(cdns_pcie_suspend_noirq,
+                                     cdns_pcie_resume_noirq)
+};

diff --git a/drivers/pci/controller/pcie-cadence.h b/drivers/pci/controller/pcie-cadence.h
index b342c808f7d69617e261d77927468b7a7e95f31e..ae6bf2a2b3d3aa80258579be3d29d1c1d577ccf3 100644 (file)
--- a/drivers/pci/controller/pcie-cadence.h
+++ b/drivers/pci/controller/pcie-cadence.h
@@ -166,6 +166,9 @@
 #define CDNS_PCIE_AT_IB_RP_BAR_ADDR1(bar) \
        (CDNS_PCIE_AT_BASE + 0x0804 + (bar) * 0x0008)
 
+/* AXI link down register */
+#define CDNS_PCIE_AT_LINKDOWN (CDNS_PCIE_AT_BASE + 0x0824)
+
 enum cdns_pcie_rp_bar {
        RP_BAR0,
        RP_BAR1,
@@ -314,5 +317,6 @@ void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r);
 void cdns_pcie_disable_phy(struct cdns_pcie *pcie);
 int cdns_pcie_enable_phy(struct cdns_pcie *pcie);
 int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie);
+extern const struct dev_pm_ops cdns_pcie_pm_ops;
 
 #endif /* _PCIE_CADENCE_H */