+2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/s390/s390.md ("tbegin", "tbegin_nofloat", "tbegin_retry")
+ ("tbegin_retry_nofloat", "tend", "tabort", "tx_assist"): Remove
+ constraint letters from expanders.
+ ("tbegin_retry", "tbegin_retry_nofloat"): Change predicate of the
+ retry count to general_operand.
+ ("tabort"): Give operand 0 a mode.
+ ("tabort_1"): Add mode and constraint letter for operand 0.
+ * doc/extend.texi: Fix protoype of __builtin_non_tx_store.
+
2013-10-04 Jeff Law <law@redhat.com>
* tree-ssa-threadedge.c: Fix some trailing whitespace problems.
; Non-constrained transaction begin
(define_expand "tbegin"
- [(match_operand:SI 0 "register_operand" "=d")
- (match_operand:BLK 1 "memory_operand" "=Q")]
+ [(match_operand:SI 0 "register_operand" "")
+ (match_operand:BLK 1 "memory_operand" "")]
"TARGET_HTM"
{
s390_expand_tbegin (operands[0], operands[1], NULL_RTX, true);
})
(define_expand "tbegin_nofloat"
- [(match_operand:SI 0 "register_operand" "=d")
- (match_operand:BLK 1 "memory_operand" "=Q")]
+ [(match_operand:SI 0 "register_operand" "")
+ (match_operand:BLK 1 "memory_operand" "")]
"TARGET_HTM"
{
s390_expand_tbegin (operands[0], operands[1], NULL_RTX, false);
})
(define_expand "tbegin_retry"
- [(match_operand:SI 0 "register_operand" "=d")
- (match_operand:BLK 1 "memory_operand" "=Q")
- (match_operand 2 "const_int_operand")]
+ [(match_operand:SI 0 "register_operand" "")
+ (match_operand:BLK 1 "memory_operand" "")
+ (match_operand:SI 2 "general_operand" "")]
"TARGET_HTM"
{
s390_expand_tbegin (operands[0], operands[1], operands[2], true);
})
(define_expand "tbegin_retry_nofloat"
- [(match_operand:SI 0 "register_operand" "=d")
- (match_operand:BLK 1 "memory_operand" "=Q")
- (match_operand 2 "const_int_operand")]
+ [(match_operand:SI 0 "register_operand" "")
+ (match_operand:BLK 1 "memory_operand" "")
+ (match_operand:SI 2 "general_operand" "")]
"TARGET_HTM"
{
s390_expand_tbegin (operands[0], operands[1], operands[2], false);
(define_expand "tend"
[(set (reg:CCRAW CC_REGNUM)
(unspec_volatile:CCRAW [(const_int 0)] UNSPECV_TEND))
- (set (match_operand:SI 0 "register_operand" "=d")
+ (set (match_operand:SI 0 "register_operand" "")
(unspec:SI [(reg:CCRAW CC_REGNUM)] UNSPEC_CC_TO_INT))]
"TARGET_HTM"
"")
; Transaction abort
(define_expand "tabort"
- [(unspec_volatile [(match_operand 0 "shift_count_or_setmem_operand" "")]
+ [(unspec_volatile [(match_operand:SI 0 "shift_count_or_setmem_operand" "")]
UNSPECV_TABORT)]
"TARGET_HTM && operands != NULL"
{
})
(define_insn "*tabort_1"
- [(unspec_volatile [(match_operand 0 "shift_count_or_setmem_operand" "")]
+ [(unspec_volatile [(match_operand:SI 0 "shift_count_or_setmem_operand" "Y")]
UNSPECV_TABORT)]
"TARGET_HTM && operands != NULL"
"tabort\t%Y0"
(define_expand "tx_assist"
[(set (match_dup 1) (const_int 0))
- (unspec_volatile [(match_operand:SI 0 "register_operand" "d")
+ (unspec_volatile [(match_operand:SI 0 "register_operand" "")
(match_dup 1)
(const_int 1)]
UNSPECV_PPA)]
is not executed as part of an transaction.
@end deftypefn
-@deftypefn {Built-in Function} void __builtin_non_tx_store (unsigned long long *, unsigned long long)
+@deftypefn {Built-in Function} void __builtin_non_tx_store (uint64_t *, uint64_t)
Generates the @code{ntstg} machine instruction. The second argument
is written to the first arguments location. The store operation will
+2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * gcc.target/s390/htm-1.c: Add more tests to cover different
+ operand types.
+
2013-10-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58126
#include <stdint.h>
#include <htmintrin.h>
-int a = 0;
+int global = 0;
uint64_t g;
+struct __htm_tdb global_tdb;
int
-foo (struct __htm_tdb* tdb)
+foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64)
{
int cc;
cc = __builtin_tbegin (0);
cc = __builtin_tbegin (tdb);
+ cc = __builtin_tbegin (&global_tdb);
+
cc = __builtin_tbegin_nofloat (0);
- cc = __builtin_tbegin_nofloat (tdb);
+ cc = __builtin_tbegin_nofloat (&global_tdb);
+
cc = __builtin_tbegin_retry (0, 42);
+ cc = __builtin_tbegin_retry (0, reg);
+ cc = __builtin_tbegin_retry (0, *mem);
+ cc = __builtin_tbegin_retry (0, global);
cc = __builtin_tbegin_retry (tdb, 42);
+ cc = __builtin_tbegin_retry (&global_tdb, 42);
+
cc = __builtin_tbegin_retry_nofloat (0, 42);
- cc = __builtin_tbegin_retry_nofloat (tdb, 42);
+ cc = __builtin_tbegin_retry_nofloat (0, reg);
+ cc = __builtin_tbegin_retry_nofloat (0, *mem);
+ cc = __builtin_tbegin_retry_nofloat (0, global);
+ cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42);
+
__builtin_tbeginc ();
+
n = __builtin_tx_nesting_depth();
- __builtin_non_tx_store(&g, n);
+
+ __builtin_non_tx_store(&g, 23);
+ __builtin_non_tx_store(mem64, 23);
+ __builtin_non_tx_store(&g, reg);
+ __builtin_non_tx_store(&g, *mem);
+ __builtin_non_tx_store(&g, global);
+
__builtin_tabort (42 + 255);
+ __builtin_tabort (reg);
+ /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */
+ __builtin_tabort (reg + 255);
+ __builtin_tabort (*mem);
+ __builtin_tabort (global);
+ /* Here global + 255 gets reloaded into a reg. Better would be to
+ just reload global or *mem and get the +255 for free as address
+ arithmetic. */
+ __builtin_tabort (*mem + 255);
+ __builtin_tabort (global + 255);
+
__builtin_tend();
+
__builtin_tx_assist (23);
+ __builtin_tx_assist (reg);
+ __builtin_tx_assist (*mem);
+ __builtin_tx_assist (global);
}
+
/* Make sure the tdb NULL argument ends up as immediate value in the
instruction. */
-/* { dg-final { scan-assembler-times "tbegin\t0," 4 } } */
+/* { dg-final { scan-assembler-times "tbegin\t0," 10 } } */