--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:22 -0800
+Subject: ARM: dts: gpio-ranges property is now required
+To: stable@vger.kernel.org
+Cc: Phil Elwell <phil@raspberrypi.com>, Stefan Wahren <stefan.wahren@i2se.com>, Florian Fainelli <f.fainelli@gmail.com>, Jan Kiszka <jan.kiszka@web.de>, Linus Walleij <linus.walleij@linaro.org>, Olof Johansson <olof@lixom.net>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-8-f.fainelli@gmail.com>
+
+From: Phil Elwell <phil@raspberrypi.com>
+
+commit c8013355ead68dce152cf426686f8a5f80d88b40 upstream
+
+Since [1], added in 5.7, the absence of a gpio-ranges property has
+prevented GPIOs from being restored to inputs when released.
+Add those properties for BCM283x and BCM2711 devices.
+
+[1] commit 2ab73c6d8323 ("gpio: Support GPIO controllers without
+ pin-ranges")
+
+Link: https://lore.kernel.org/r/20220104170247.956760-1-linus.walleij@linaro.org
+Fixes: 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges")
+Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs")
+Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
+Reported-by: Florian Fainelli <f.fainelli@gmail.com>
+Reported-by: Jan Kiszka <jan.kiszka@web.de>
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Link: https://lore.kernel.org/r/20211206092237.4105895-3-phil@raspberrypi.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+[florian: Remove bcm2711.dtsi hunk which does not exist in 5.4]
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -183,6 +183,7 @@
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
++ gpio-ranges = <&gpio 0 0 54>;
+
+ /* Defines pin muxing groups according to
+ * BCM2835-ARM-Peripherals.pdf page 102.
--- /dev/null
+From adab993c25191b839b415781bdc7173a77315240 Mon Sep 17 00:00:00 2001
+From: Tim Harvey <tharvey@gateworks.com>
+Date: Wed, 3 Nov 2021 09:54:15 -0700
+Subject: mmc: sdhci-esdhc-imx: disable CMDQ support
+
+From: Tim Harvey <tharvey@gateworks.com>
+
+commit adab993c25191b839b415781bdc7173a77315240 upstream.
+
+On IMX SoC's which support CMDQ the following can occur during high a
+high cpu load:
+
+mmc2: cqhci: ============ CQHCI REGISTER DUMP ===========
+mmc2: cqhci: Caps: 0x0000310a | Version: 0x00000510
+mmc2: cqhci: Config: 0x00001001 | Control: 0x00000000
+mmc2: cqhci: Int stat: 0x00000000 | Int enab: 0x00000006
+mmc2: cqhci: Int sig: 0x00000006 | Int Coal: 0x00000000
+mmc2: cqhci: TDL base: 0x8003f000 | TDL up32: 0x00000000
+mmc2: cqhci: Doorbell: 0xbf01dfff | TCN: 0x00000000
+mmc2: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x08000000
+mmc2: cqhci: Task clr: 0x00000000 | SSC1: 0x00011000
+mmc2: cqhci: SSC2: 0x00000001 | DCMD rsp: 0x00000800
+mmc2: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x00000000
+mmc2: cqhci: Resp idx: 0x0000000d | Resp arg: 0x00000000
+mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
+mmc2: sdhci: Sys addr: 0x7c722000 | Version: 0x00000002
+mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000020
+mmc2: sdhci: Argument: 0x00018000 | Trn mode: 0x00000023
+mmc2: sdhci: Present: 0x01f88008 | Host ctl: 0x00000030
+mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
+mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x0000000f
+mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
+mmc2: sdhci: Int enab: 0x107f4000 | Sig enab: 0x107f4000
+mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000502
+mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x8000b407
+mmc2: sdhci: Cmd: 0x00000d1a | Max curr: 0x00ffffff
+mmc2: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0xffc003ff
+mmc2: sdhci: Resp[2]: 0x328f5903 | Resp[3]: 0x00d07f01
+mmc2: sdhci: Host ctl2: 0x00000088
+mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0xfe179020
+mmc2: sdhci-esdhc-imx: ========= ESDHC IMX DEBUG STATUS DUMP ====
+mmc2: sdhci-esdhc-imx: cmd debug status: 0x2120
+mmc2: sdhci-esdhc-imx: data debug status: 0x2200
+mmc2: sdhci-esdhc-imx: trans debug status: 0x2300
+mmc2: sdhci-esdhc-imx: dma debug status: 0x2400
+mmc2: sdhci-esdhc-imx: adma debug status: 0x2510
+mmc2: sdhci-esdhc-imx: fifo debug status: 0x2680
+mmc2: sdhci-esdhc-imx: async fifo debug status: 0x2750
+mmc2: sdhci: ============================================
+
+For now, disable CMDQ support on the imx8qm/imx8qxp/imx8mm until the
+issue is found and resolved.
+
+Fixes: bb6e358169bf6 ("mmc: sdhci-esdhc-imx: add CMDQ support")
+Fixes: cde5e8e9ff146 ("mmc: sdhci-esdhc-imx: Add an new esdhc_soc_data for i.MX8MM")
+Cc: stable@vger.kernel.org
+Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
+Acked-by: Adrian Hunter <adrian.hunter@intel.com>
+Link: https://lore.kernel.org/r/20211103165415.2016-1-tharvey@gateworks.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -218,8 +218,7 @@ static struct esdhc_soc_data usdhc_imx7u
+ static struct esdhc_soc_data usdhc_imx8qxp_data = {
+ .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
+ | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
+- | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES
+- | ESDHC_FLAG_CQHCI,
++ | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES,
+ };
+
+ struct pltfm_imx_data {
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:18 -0800
+Subject: pinctrl: bcm2835: Add support for all GPIOs on BCM2711
+To: stable@vger.kernel.org
+Cc: Stefan Wahren <stefan.wahren@i2se.com>, Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, Linus Walleij <linus.walleij@linaro.org>, Florian Fainelli <f.fainelli@gmail.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, Phil Elwell <phil@raspberrypi.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-4-f.fainelli@gmail.com>
+
+From: Stefan Wahren <stefan.wahren@i2se.com>
+
+commit b1d84a3d0a26c5844a22bc09a42704b9371208bb upstream
+
+The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Link: https://lore.kernel.org/r/1581166975-22949-4-git-send-email-stefan.wahren@i2se.com
+Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 54 ++++++++++++++++++++++++++--------
+ 1 file changed, 42 insertions(+), 12 deletions(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -37,6 +37,7 @@
+
+ #define MODULE_NAME "pinctrl-bcm2835"
+ #define BCM2835_NUM_GPIOS 54
++#define BCM2711_NUM_GPIOS 58
+ #define BCM2835_NUM_BANKS 2
+ #define BCM2835_NUM_IRQS 3
+
+@@ -78,7 +79,7 @@ struct bcm2835_pinctrl {
+
+ /* note: locking assumes each bank will have its own unsigned long */
+ unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
+- unsigned int irq_type[BCM2835_NUM_GPIOS];
++ unsigned int irq_type[BCM2711_NUM_GPIOS];
+
+ struct pinctrl_dev *pctl_dev;
+ struct gpio_chip gpio_chip;
+@@ -145,6 +146,10 @@ static struct pinctrl_pin_desc bcm2835_g
+ BCM2835_GPIO_PIN(51),
+ BCM2835_GPIO_PIN(52),
+ BCM2835_GPIO_PIN(53),
++ BCM2835_GPIO_PIN(54),
++ BCM2835_GPIO_PIN(55),
++ BCM2835_GPIO_PIN(56),
++ BCM2835_GPIO_PIN(57),
+ };
+
+ /* one pin per group */
+@@ -203,6 +208,10 @@ static const char * const bcm2835_gpio_g
+ "gpio51",
+ "gpio52",
+ "gpio53",
++ "gpio54",
++ "gpio55",
++ "gpio56",
++ "gpio57",
+ };
+
+ enum bcm2835_fsel {
+@@ -353,6 +362,22 @@ static const struct gpio_chip bcm2835_gp
+ .can_sleep = false,
+ };
+
++static const struct gpio_chip bcm2711_gpio_chip = {
++ .label = "pinctrl-bcm2711",
++ .owner = THIS_MODULE,
++ .request = gpiochip_generic_request,
++ .free = gpiochip_generic_free,
++ .direction_input = bcm2835_gpio_direction_input,
++ .direction_output = bcm2835_gpio_direction_output,
++ .get_direction = bcm2835_gpio_get_direction,
++ .get = bcm2835_gpio_get,
++ .set = bcm2835_gpio_set,
++ .set_config = gpiochip_generic_config,
++ .base = -1,
++ .ngpio = BCM2711_NUM_GPIOS,
++ .can_sleep = false,
++};
++
+ static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,
+ unsigned int bank, u32 mask)
+ {
+@@ -399,7 +424,7 @@ static void bcm2835_gpio_irq_handler(str
+ bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000);
+ bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff);
+ break;
+- case 2: /* IRQ2 covers GPIOs 46-53 */
++ case 2: /* IRQ2 covers GPIOs 46-57 */
+ bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000);
+ break;
+ }
+@@ -618,7 +643,7 @@ static struct irq_chip bcm2835_gpio_irq_
+
+ static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
+ {
+- return ARRAY_SIZE(bcm2835_gpio_groups);
++ return BCM2835_NUM_GPIOS;
+ }
+
+ static const char *bcm2835_pctl_get_group_name(struct pinctrl_dev *pctldev,
+@@ -776,7 +801,7 @@ static int bcm2835_pctl_dt_node_to_map(s
+ err = of_property_read_u32_index(np, "brcm,pins", i, &pin);
+ if (err)
+ goto out;
+- if (pin >= ARRAY_SIZE(bcm2835_gpio_pins)) {
++ if (pin >= pc->pctl_desc.npins) {
+ dev_err(pc->dev, "%pOF: invalid brcm,pins value %d\n",
+ np, pin);
+ err = -EINVAL;
+@@ -852,7 +877,7 @@ static int bcm2835_pmx_get_function_grou
+ {
+ /* every pin can do every function */
+ *groups = bcm2835_gpio_groups;
+- *num_groups = ARRAY_SIZE(bcm2835_gpio_groups);
++ *num_groups = BCM2835_NUM_GPIOS;
+
+ return 0;
+ }
+@@ -1055,7 +1080,7 @@ static const struct pinconf_ops bcm2711_
+ static const struct pinctrl_desc bcm2835_pinctrl_desc = {
+ .name = MODULE_NAME,
+ .pins = bcm2835_gpio_pins,
+- .npins = ARRAY_SIZE(bcm2835_gpio_pins),
++ .npins = BCM2835_NUM_GPIOS,
+ .pctlops = &bcm2835_pctl_ops,
+ .pmxops = &bcm2835_pmx_ops,
+ .confops = &bcm2835_pinconf_ops,
+@@ -1063,9 +1088,9 @@ static const struct pinctrl_desc bcm2835
+ };
+
+ static const struct pinctrl_desc bcm2711_pinctrl_desc = {
+- .name = MODULE_NAME,
++ .name = "pinctrl-bcm2711",
+ .pins = bcm2835_gpio_pins,
+- .npins = ARRAY_SIZE(bcm2835_gpio_pins),
++ .npins = BCM2711_NUM_GPIOS,
+ .pctlops = &bcm2835_pctl_ops,
+ .pmxops = &bcm2835_pmx_ops,
+ .confops = &bcm2711_pinconf_ops,
+@@ -1077,6 +1102,11 @@ static const struct pinctrl_gpio_range b
+ .npins = BCM2835_NUM_GPIOS,
+ };
+
++static const struct pinctrl_gpio_range bcm2711_pinctrl_gpio_range = {
++ .name = "pinctrl-bcm2711",
++ .npins = BCM2711_NUM_GPIOS,
++};
++
+ struct bcm_plat_data {
+ const struct gpio_chip *gpio_chip;
+ const struct pinctrl_desc *pctl_desc;
+@@ -1090,9 +1120,9 @@ static const struct bcm_plat_data bcm283
+ };
+
+ static const struct bcm_plat_data bcm2711_plat_data = {
+- .gpio_chip = &bcm2835_gpio_chip,
++ .gpio_chip = &bcm2711_gpio_chip,
+ .pctl_desc = &bcm2711_pinctrl_desc,
+- .gpio_range = &bcm2835_pinctrl_gpio_range,
++ .gpio_range = &bcm2711_pinctrl_gpio_range,
+ };
+
+ static const struct of_device_id bcm2835_pinctrl_match[] = {
+@@ -1118,8 +1148,8 @@ static int bcm2835_pinctrl_probe(struct
+ int err, i;
+ const struct of_device_id *match;
+
+- BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2835_NUM_GPIOS);
+- BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2835_NUM_GPIOS);
++ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
++ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
+
+ pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
+ if (!pc)
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:20 -0800
+Subject: pinctrl: bcm2835: Add support for wake-up interrupts
+To: stable@vger.kernel.org
+Cc: Florian Fainelli <f.fainelli@gmail.com>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, Phil Elwell <phil@raspberrypi.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-6-f.fainelli@gmail.com>
+
+From: Florian Fainelli <f.fainelli@gmail.com>
+
+commit 920fecc1aa4591da27ef9dcb338fc5da86b404d7 upstream
+
+Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to
+specifically treat the GPIO interrupts during suspend and resume, and
+simply implement an irq_set_wake() callback that is responsible for
+enabling the parent wake-up interrupt as a wake-up interrupt.
+
+To avoid allocating unnecessary resources for other chips, the wake-up
+interrupts are only initialized if we have a brcm,bcm7211-gpio
+compatibility string.
+
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Link: https://lore.kernel.org/r/20200531001101.24945-5-f.fainelli@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 76 +++++++++++++++++++++++++++++++++-
+ 1 file changed, 75 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -19,6 +19,7 @@
+ #include <linux/irq.h>
+ #include <linux/irqdesc.h>
+ #include <linux/init.h>
++#include <linux/interrupt.h>
+ #include <linux/of_address.h>
+ #include <linux/of.h>
+ #include <linux/of_irq.h>
+@@ -76,6 +77,7 @@
+ struct bcm2835_pinctrl {
+ struct device *dev;
+ void __iomem *base;
++ int *wake_irq;
+
+ /* note: locking assumes each bank will have its own unsigned long */
+ unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
+@@ -432,6 +434,11 @@ static void bcm2835_gpio_irq_handler(str
+ chained_irq_exit(host_chip, desc);
+ }
+
++static irqreturn_t bcm2835_gpio_wake_irq_handler(int irq, void *dev_id)
++{
++ return IRQ_HANDLED;
++}
++
+ static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
+ unsigned reg, unsigned offset, bool enable)
+ {
+@@ -631,6 +638,34 @@ static void bcm2835_gpio_irq_ack(struct
+ bcm2835_gpio_set_bit(pc, GPEDS0, gpio);
+ }
+
++static int bcm2835_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
++{
++ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
++ struct bcm2835_pinctrl *pc = gpiochip_get_data(chip);
++ unsigned gpio = irqd_to_hwirq(data);
++ unsigned int irqgroup;
++ int ret = -EINVAL;
++
++ if (!pc->wake_irq)
++ return ret;
++
++ if (gpio <= 27)
++ irqgroup = 0;
++ else if (gpio >= 28 && gpio <= 45)
++ irqgroup = 1;
++ else if (gpio >= 46 && gpio <= 57)
++ irqgroup = 2;
++ else
++ return ret;
++
++ if (on)
++ ret = enable_irq_wake(pc->wake_irq[irqgroup]);
++ else
++ ret = disable_irq_wake(pc->wake_irq[irqgroup]);
++
++ return ret;
++}
++
+ static struct irq_chip bcm2835_gpio_irq_chip = {
+ .name = MODULE_NAME,
+ .irq_enable = bcm2835_gpio_irq_enable,
+@@ -639,6 +674,8 @@ static struct irq_chip bcm2835_gpio_irq_
+ .irq_ack = bcm2835_gpio_irq_ack,
+ .irq_mask = bcm2835_gpio_irq_disable,
+ .irq_unmask = bcm2835_gpio_irq_enable,
++ .irq_set_wake = bcm2835_gpio_irq_set_wake,
++ .flags = IRQCHIP_MASK_ON_SUSPEND,
+ };
+
+ static int bcm2835_pctl_get_groups_count(struct pinctrl_dev *pctldev)
+@@ -1151,6 +1188,7 @@ static int bcm2835_pinctrl_probe(struct
+ struct resource iomem;
+ int err, i;
+ const struct of_device_id *match;
++ int is_7211 = 0;
+
+ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_pins) != BCM2711_NUM_GPIOS);
+ BUILD_BUG_ON(ARRAY_SIZE(bcm2835_gpio_groups) != BCM2711_NUM_GPIOS);
+@@ -1177,6 +1215,7 @@ static int bcm2835_pinctrl_probe(struct
+ return -EINVAL;
+
+ pdata = match->data;
++ is_7211 = of_device_is_compatible(np, "brcm,bcm7211-gpio");
+
+ pc->gpio_chip = *pdata->gpio_chip;
+ pc->gpio_chip.parent = dev;
+@@ -1211,6 +1250,15 @@ static int bcm2835_pinctrl_probe(struct
+ GFP_KERNEL);
+ if (!girq->parents)
+ return -ENOMEM;
++
++ if (is_7211) {
++ pc->wake_irq = devm_kcalloc(dev, BCM2835_NUM_IRQS,
++ sizeof(*pc->wake_irq),
++ GFP_KERNEL);
++ if (!pc->wake_irq)
++ return -ENOMEM;
++ }
++
+ /*
+ * Use the same handler for all groups: this is necessary
+ * since we use one gpiochip to cover all lines - the
+@@ -1218,8 +1266,34 @@ static int bcm2835_pinctrl_probe(struct
+ * bank that was firing the IRQ and look up the per-group
+ * and bank data.
+ */
+- for (i = 0; i < BCM2835_NUM_IRQS; i++)
++ for (i = 0; i < BCM2835_NUM_IRQS; i++) {
++ int len;
++ char *name;
++
+ girq->parents[i] = irq_of_parse_and_map(np, i);
++ if (!is_7211)
++ continue;
++
++ /* Skip over the all banks interrupts */
++ pc->wake_irq[i] = irq_of_parse_and_map(np, i +
++ BCM2835_NUM_IRQS + 1);
++
++ len = strlen(dev_name(pc->dev)) + 16;
++ name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
++ if (!name)
++ return -ENOMEM;
++
++ snprintf(name, len, "%s:bank%d", dev_name(pc->dev), i);
++
++ /* These are optional interrupts */
++ err = devm_request_irq(dev, pc->wake_irq[i],
++ bcm2835_gpio_wake_irq_handler,
++ IRQF_SHARED, name, pc);
++ if (err)
++ dev_warn(dev, "unable to request wake IRQ %d\n",
++ pc->wake_irq[i]);
++ }
++
+ girq->default_type = IRQ_TYPE_NONE;
+ girq->handler = handle_level_irq;
+
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:21 -0800
+Subject: pinctrl: bcm2835: Change init order for gpio hogs
+To: stable@vger.kernel.org
+Cc: Phil Elwell <phil@raspberrypi.com>, Florian Fainelli <f.fainelli@gmail.com>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-7-f.fainelli@gmail.com>
+
+From: Phil Elwell <phil@raspberrypi.com>
+
+commit 266423e60ea1b953fcc0cd97f3dad85857e434d1 upstream
+
+...and gpio-ranges
+
+pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio
+side is registered first, but this breaks gpio hogs (which are
+configured during gpiochip_add_data). Part of the hog initialisation
+is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't
+yet been registered this results in an -EPROBE_DEFER from which it can
+never recover.
+
+Change the initialisation sequence to register the pinctrl driver
+first.
+
+This also solves a similar problem with the gpio-ranges property, which
+is required in order for released pins to be returned to inputs.
+
+Fixes: 73345a18d464b ("pinctrl: bcm2835: Pass irqchip when adding gpiochip")
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Link: https://lore.kernel.org/r/20211206092237.4105895-2-phil@raspberrypi.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 29 ++++++++++++++++-------------
+ 1 file changed, 16 insertions(+), 13 deletions(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -1241,6 +1241,18 @@ static int bcm2835_pinctrl_probe(struct
+ raw_spin_lock_init(&pc->irq_lock[i]);
+ }
+
++ pc->pctl_desc = *pdata->pctl_desc;
++ pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
++ if (IS_ERR(pc->pctl_dev)) {
++ gpiochip_remove(&pc->gpio_chip);
++ return PTR_ERR(pc->pctl_dev);
++ }
++
++ pc->gpio_range = *pdata->gpio_range;
++ pc->gpio_range.base = pc->gpio_chip.base;
++ pc->gpio_range.gc = &pc->gpio_chip;
++ pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
++
+ girq = &pc->gpio_chip.irq;
+ girq->chip = &bcm2835_gpio_irq_chip;
+ girq->parent_handler = bcm2835_gpio_irq_handler;
+@@ -1248,8 +1260,10 @@ static int bcm2835_pinctrl_probe(struct
+ girq->parents = devm_kcalloc(dev, BCM2835_NUM_IRQS,
+ sizeof(*girq->parents),
+ GFP_KERNEL);
+- if (!girq->parents)
++ if (!girq->parents) {
++ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range);
+ return -ENOMEM;
++ }
+
+ if (is_7211) {
+ pc->wake_irq = devm_kcalloc(dev, BCM2835_NUM_IRQS,
+@@ -1300,21 +1314,10 @@ static int bcm2835_pinctrl_probe(struct
+ err = gpiochip_add_data(&pc->gpio_chip, pc);
+ if (err) {
+ dev_err(dev, "could not add GPIO chip\n");
++ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range);
+ return err;
+ }
+
+- pc->pctl_desc = *pdata->pctl_desc;
+- pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
+- if (IS_ERR(pc->pctl_dev)) {
+- gpiochip_remove(&pc->gpio_chip);
+- return PTR_ERR(pc->pctl_dev);
+- }
+-
+- pc->gpio_range = *pdata->gpio_range;
+- pc->gpio_range.base = pc->gpio_chip.base;
+- pc->gpio_range.gc = &pc->gpio_chip;
+- pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
+-
+ return 0;
+ }
+
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:16 -0800
+Subject: pinctrl: bcm2835: Drop unused define
+To: stable@vger.kernel.org
+Cc: Stefan Wahren <stefan.wahren@i2se.com>, Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, Linus Walleij <linus.walleij@linaro.org>, Florian Fainelli <f.fainelli@gmail.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, Phil Elwell <phil@raspberrypi.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-2-f.fainelli@gmail.com>
+
+From: Stefan Wahren <stefan.wahren@i2se.com>
+
+commit be30d5de0a5a52c6ee2cc453a51301037ab94aa upstream
+
+There is no usage for this define, so drop it.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Link: https://lore.kernel.org/r/1580148908-4863-2-git-send-email-stefan.wahren@i2se.com
+Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -40,9 +40,6 @@
+ #define BCM2835_NUM_BANKS 2
+ #define BCM2835_NUM_IRQS 3
+
+-#define BCM2835_PIN_BITMAP_SZ \
+- DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
+-
+ /* GPIO register offsets */
+ #define GPFSEL0 0x0 /* Function Select */
+ #define GPSET0 0x1c /* Pin Output Set */
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:19 -0800
+Subject: pinctrl: bcm2835: Match BCM7211 compatible string
+To: stable@vger.kernel.org
+Cc: Florian Fainelli <f.fainelli@gmail.com>, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, Phil Elwell <phil@raspberrypi.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-5-f.fainelli@gmail.com>
+
+From: Florian Fainelli <f.fainelli@gmail.com>
+
+commit 562c856f96d22ef1204b0a314bc52e85617199b4 upstream
+
+The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
+BCM2711 SoC, match the compatible string and use the correct set of
+options.
+
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Link: https://lore.kernel.org/r/20200531001101.24945-4-f.fainelli@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -1134,6 +1134,10 @@ static const struct of_device_id bcm2835
+ .compatible = "brcm,bcm2711-gpio",
+ .data = &bcm2711_plat_data,
+ },
++ {
++ .compatible = "brcm,bcm7211-gpio",
++ .data = &bcm2711_plat_data,
++ },
+ {}
+ };
+
--- /dev/null
+From foo@baz Thu Jan 27 04:40:37 PM CET 2022
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Tue, 25 Jan 2022 11:42:17 -0800
+Subject: pinctrl: bcm2835: Refactor platform data
+To: stable@vger.kernel.org
+Cc: Stefan Wahren <stefan.wahren@i2se.com>, Nicolas Saenz Julienne <nsaenzjulienne@suse.de>, Linus Walleij <linus.walleij@linaro.org>, Florian Fainelli <f.fainelli@gmail.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt <eric@anholt.net>, Stefan Wahren <wahrenst@gmx.net>, Nicolas Saenz Julienne <nsaenz@kernel.org>, Phil Elwell <phil@raspberrypi.com>, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:PIN CONTROL SUBSYSTEM), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE)
+Message-ID: <20220125194222.12783-3-f.fainelli@gmail.com>
+
+From: Stefan Wahren <stefan.wahren@i2se.com>
+
+commit 90bfaf028d61a6d523c685b63c2bcc94eebb8057 upstream
+
+This prepares the platform data to be easier to extend for more GPIOs.
+Except of this there is no functional change.
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com
+Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 57 ++++++++++++++++++++++++++--------
+ 1 file changed, 44 insertions(+), 13 deletions(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -82,6 +82,7 @@ struct bcm2835_pinctrl {
+
+ struct pinctrl_dev *pctl_dev;
+ struct gpio_chip gpio_chip;
++ struct pinctrl_desc pctl_desc;
+ struct pinctrl_gpio_range gpio_range;
+
+ raw_spinlock_t irq_lock[BCM2835_NUM_BANKS];
+@@ -1051,7 +1052,7 @@ static const struct pinconf_ops bcm2711_
+ .pin_config_set = bcm2711_pinconf_set,
+ };
+
+-static struct pinctrl_desc bcm2835_pinctrl_desc = {
++static const struct pinctrl_desc bcm2835_pinctrl_desc = {
+ .name = MODULE_NAME,
+ .pins = bcm2835_gpio_pins,
+ .npins = ARRAY_SIZE(bcm2835_gpio_pins),
+@@ -1061,19 +1062,47 @@ static struct pinctrl_desc bcm2835_pinct
+ .owner = THIS_MODULE,
+ };
+
+-static struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
++static const struct pinctrl_desc bcm2711_pinctrl_desc = {
++ .name = MODULE_NAME,
++ .pins = bcm2835_gpio_pins,
++ .npins = ARRAY_SIZE(bcm2835_gpio_pins),
++ .pctlops = &bcm2835_pctl_ops,
++ .pmxops = &bcm2835_pmx_ops,
++ .confops = &bcm2711_pinconf_ops,
++ .owner = THIS_MODULE,
++};
++
++static const struct pinctrl_gpio_range bcm2835_pinctrl_gpio_range = {
+ .name = MODULE_NAME,
+ .npins = BCM2835_NUM_GPIOS,
+ };
+
++struct bcm_plat_data {
++ const struct gpio_chip *gpio_chip;
++ const struct pinctrl_desc *pctl_desc;
++ const struct pinctrl_gpio_range *gpio_range;
++};
++
++static const struct bcm_plat_data bcm2835_plat_data = {
++ .gpio_chip = &bcm2835_gpio_chip,
++ .pctl_desc = &bcm2835_pinctrl_desc,
++ .gpio_range = &bcm2835_pinctrl_gpio_range,
++};
++
++static const struct bcm_plat_data bcm2711_plat_data = {
++ .gpio_chip = &bcm2835_gpio_chip,
++ .pctl_desc = &bcm2711_pinctrl_desc,
++ .gpio_range = &bcm2835_pinctrl_gpio_range,
++};
++
+ static const struct of_device_id bcm2835_pinctrl_match[] = {
+ {
+ .compatible = "brcm,bcm2835-gpio",
+- .data = &bcm2835_pinconf_ops,
++ .data = &bcm2835_plat_data,
+ },
+ {
+ .compatible = "brcm,bcm2711-gpio",
+- .data = &bcm2711_pinconf_ops,
++ .data = &bcm2711_plat_data,
+ },
+ {}
+ };
+@@ -1082,6 +1111,7 @@ static int bcm2835_pinctrl_probe(struct
+ {
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
++ const struct bcm_plat_data *pdata;
+ struct bcm2835_pinctrl *pc;
+ struct gpio_irq_chip *girq;
+ struct resource iomem;
+@@ -1108,7 +1138,13 @@ static int bcm2835_pinctrl_probe(struct
+ if (IS_ERR(pc->base))
+ return PTR_ERR(pc->base);
+
+- pc->gpio_chip = bcm2835_gpio_chip;
++ match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
++ if (!match)
++ return -EINVAL;
++
++ pdata = match->data;
++
++ pc->gpio_chip = *pdata->gpio_chip;
+ pc->gpio_chip.parent = dev;
+ pc->gpio_chip.of_node = np;
+
+@@ -1159,19 +1195,14 @@ static int bcm2835_pinctrl_probe(struct
+ return err;
+ }
+
+- match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node);
+- if (match) {
+- bcm2835_pinctrl_desc.confops =
+- (const struct pinconf_ops *)match->data;
+- }
+-
+- pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc);
++ pc->pctl_desc = *pdata->pctl_desc;
++ pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
+ if (IS_ERR(pc->pctl_dev)) {
+ gpiochip_remove(&pc->gpio_chip);
+ return PTR_ERR(pc->pctl_dev);
+ }
+
+- pc->gpio_range = bcm2835_pinctrl_gpio_range;
++ pc->gpio_range = *pdata->gpio_range;
+ pc->gpio_range.base = pc->gpio_chip.base;
+ pc->gpio_range.gc = &pc->gpio_chip;
+ pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
--- /dev/null
+From 614ddad17f22a22e035e2ea37a04815f50362017 Mon Sep 17 00:00:00 2001
+From: "Paul E. McKenney" <paulmck@kernel.org>
+Date: Fri, 17 Sep 2021 15:04:48 -0700
+Subject: rcu: Tighten rcu_advance_cbs_nowake() checks
+
+From: Paul E. McKenney <paulmck@kernel.org>
+
+commit 614ddad17f22a22e035e2ea37a04815f50362017 upstream.
+
+Currently, rcu_advance_cbs_nowake() checks that a grace period is in
+progress, however, that grace period could end just after the check.
+This commit rechecks that a grace period is still in progress while
+holding the rcu_node structure's lock. The grace period cannot end while
+the current CPU's rcu_node structure's ->lock is held, thus avoiding
+false positives from the WARN_ON_ONCE().
+
+As Daniel Vacek noted, it is not necessary for the rcu_node structure
+to have a CPU that has not yet passed through its quiescent state.
+
+Tested-by: Guillaume Morin <guillaume@morinfr.org>
+Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ kernel/rcu/tree.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/kernel/rcu/tree.c
++++ b/kernel/rcu/tree.c
+@@ -1358,10 +1358,11 @@ static void __maybe_unused rcu_advance_c
+ struct rcu_data *rdp)
+ {
+ rcu_lockdep_assert_cblist_protected(rdp);
+- if (!rcu_seq_state(rcu_seq_current(&rnp->gp_seq)) ||
+- !raw_spin_trylock_rcu_node(rnp))
++ if (!rcu_seq_state(rcu_seq_current(&rnp->gp_seq)) || !raw_spin_trylock_rcu_node(rnp))
+ return;
+- WARN_ON_ONCE(rcu_advance_cbs(rnp, rdp));
++ // The grace period cannot end while we hold the rcu_node lock.
++ if (rcu_seq_state(rcu_seq_current(&rnp->gp_seq)))
++ WARN_ON_ONCE(rcu_advance_cbs(rnp, rdp));
+ raw_spin_unlock_rcu_node(rnp);
+ }
+
--- /dev/null
+From 68514dacf2715d11b91ca50d88de047c086fea9c Mon Sep 17 00:00:00 2001
+From: Jan Kara <jack@suse.cz>
+Date: Mon, 10 Jan 2022 19:19:23 +0100
+Subject: select: Fix indefinitely sleeping task in poll_schedule_timeout()
+
+From: Jan Kara <jack@suse.cz>
+
+commit 68514dacf2715d11b91ca50d88de047c086fea9c upstream.
+
+A task can end up indefinitely sleeping in do_select() ->
+poll_schedule_timeout() when the following race happens:
+
+ TASK1 (thread1) TASK2 TASK1 (thread2)
+ do_select()
+ setup poll_wqueues table
+ with 'fd'
+ write data to 'fd'
+ pollwake()
+ table->triggered = 1
+ closes 'fd' thread1 is
+ waiting for
+ poll_schedule_timeout()
+ - sees table->triggered
+ table->triggered = 0
+ return -EINTR
+ loop back in do_select()
+
+But at this point when TASK1 loops back, the fdget() in the setup of
+poll_wqueues fails. So now so we never find 'fd' is ready for reading
+and sleep in poll_schedule_timeout() indefinitely.
+
+Treat an fd that got closed as a fd on which some event happened. This
+makes sure cannot block indefinitely in do_select().
+
+Another option would be to return -EBADF in this case but that has a
+potential of subtly breaking applications that excercise this behavior
+and it happens to work for them. So returning fd as active seems like a
+safer choice.
+
+Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
+CC: stable@vger.kernel.org
+Signed-off-by: Jan Kara <jack@suse.cz>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ fs/select.c | 63 +++++++++++++++++++++++++++++++-----------------------------
+ 1 file changed, 33 insertions(+), 30 deletions(-)
+
+--- a/fs/select.c
++++ b/fs/select.c
+@@ -458,9 +458,11 @@ get_max:
+ return max;
+ }
+
+-#define POLLIN_SET (EPOLLRDNORM | EPOLLRDBAND | EPOLLIN | EPOLLHUP | EPOLLERR)
+-#define POLLOUT_SET (EPOLLWRBAND | EPOLLWRNORM | EPOLLOUT | EPOLLERR)
+-#define POLLEX_SET (EPOLLPRI)
++#define POLLIN_SET (EPOLLRDNORM | EPOLLRDBAND | EPOLLIN | EPOLLHUP | EPOLLERR |\
++ EPOLLNVAL)
++#define POLLOUT_SET (EPOLLWRBAND | EPOLLWRNORM | EPOLLOUT | EPOLLERR |\
++ EPOLLNVAL)
++#define POLLEX_SET (EPOLLPRI | EPOLLNVAL)
+
+ static inline void wait_key_set(poll_table *wait, unsigned long in,
+ unsigned long out, unsigned long bit,
+@@ -527,6 +529,7 @@ static int do_select(int n, fd_set_bits
+ break;
+ if (!(bit & all_bits))
+ continue;
++ mask = EPOLLNVAL;
+ f = fdget(i);
+ if (f.file) {
+ wait_key_set(wait, in, out, bit,
+@@ -534,34 +537,34 @@ static int do_select(int n, fd_set_bits
+ mask = vfs_poll(f.file, wait);
+
+ fdput(f);
+- if ((mask & POLLIN_SET) && (in & bit)) {
+- res_in |= bit;
+- retval++;
+- wait->_qproc = NULL;
+- }
+- if ((mask & POLLOUT_SET) && (out & bit)) {
+- res_out |= bit;
+- retval++;
+- wait->_qproc = NULL;
+- }
+- if ((mask & POLLEX_SET) && (ex & bit)) {
+- res_ex |= bit;
+- retval++;
+- wait->_qproc = NULL;
+- }
+- /* got something, stop busy polling */
+- if (retval) {
+- can_busy_loop = false;
+- busy_flag = 0;
+-
+- /*
+- * only remember a returned
+- * POLL_BUSY_LOOP if we asked for it
+- */
+- } else if (busy_flag & mask)
+- can_busy_loop = true;
+-
+ }
++ if ((mask & POLLIN_SET) && (in & bit)) {
++ res_in |= bit;
++ retval++;
++ wait->_qproc = NULL;
++ }
++ if ((mask & POLLOUT_SET) && (out & bit)) {
++ res_out |= bit;
++ retval++;
++ wait->_qproc = NULL;
++ }
++ if ((mask & POLLEX_SET) && (ex & bit)) {
++ res_ex |= bit;
++ retval++;
++ wait->_qproc = NULL;
++ }
++ /* got something, stop busy polling */
++ if (retval) {
++ can_busy_loop = false;
++ busy_flag = 0;
++
++ /*
++ * only remember a returned
++ * POLL_BUSY_LOOP if we asked for it
++ */
++ } else if (busy_flag & mask)
++ can_busy_loop = true;
++
+ }
+ if (res_in)
+ *rinp = res_in;
drm-i915-flush-tlbs-before-releasing-backing-store.patch
+rcu-tighten-rcu_advance_cbs_nowake-checks.patch
+pinctrl-bcm2835-drop-unused-define.patch
+pinctrl-bcm2835-refactor-platform-data.patch
+pinctrl-bcm2835-add-support-for-all-gpios-on-bcm2711.patch
+pinctrl-bcm2835-match-bcm7211-compatible-string.patch
+pinctrl-bcm2835-add-support-for-wake-up-interrupts.patch
+pinctrl-bcm2835-change-init-order-for-gpio-hogs.patch
+arm-dts-gpio-ranges-property-is-now-required.patch
+mmc-sdhci-esdhc-imx-disable-cmdq-support.patch
+select-fix-indefinitely-sleeping-task-in-poll_schedule_timeout.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
