]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: stmmac: add support for controlling PCS interrupts
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Thu, 23 Oct 2025 09:46:25 +0000 (10:46 +0100)
committerJakub Kicinski <kuba@kernel.org>
Sat, 25 Oct 2025 01:56:34 +0000 (18:56 -0700)
Add support to the PCS instance for controlling the PCS interrupts
depending on whether the PCS is used.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vBrtp-0000000BMYs-3bhI@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
drivers/net/ethernet/stmicro/stmmac/dwmac4.h
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h

index 8f3002d9de78b9e635683d561218a7b7f657311a..697bba641e050b5252407150e41ad2ab0c4238d1 100644 (file)
 #define        GMAC_INT_DISABLE_PCSAN          BIT(2)
 #define        GMAC_INT_DISABLE_PMT            BIT(3)
 #define        GMAC_INT_DISABLE_TIMESTAMP      BIT(9)
-#define        GMAC_INT_DISABLE_PCS    (GMAC_INT_DISABLE_PCSLINK | \
-                                GMAC_INT_DISABLE_PCSAN)
 #define        GMAC_INT_DEFAULT_MASK   (GMAC_INT_DISABLE_RGMII | \
-                                GMAC_INT_DISABLE_TIMESTAMP | \
-                                GMAC_INT_DISABLE_PCS)
+                                GMAC_INT_DISABLE_PCSLINK | \
+                                GMAC_INT_DISABLE_PCSAN | \
+                                GMAC_INT_DISABLE_TIMESTAMP)
 
 /* PMT Control and Status */
 #define GMAC_PMT               0x0000002c
index 2ca94bfd3f718607a08edc7028d5c26c480b6c5e..a2ae136d2c0e9174c5292e36f9078bdfa96bb698 100644 (file)
@@ -27,7 +27,9 @@ static int dwmac1000_pcs_init(struct stmmac_priv *priv)
        if (!priv->dma_cap.pcs)
                return 0;
 
-       return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE);
+       return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
+                                         GMAC_INT_DISABLE_PCSLINK |
+                                         GMAC_INT_DISABLE_PCSAN);
 }
 
 static void dwmac1000_core_init(struct mac_device_info *hw,
@@ -48,12 +50,7 @@ static void dwmac1000_core_init(struct mac_device_info *hw,
        writel(value | GMAC_CORE_INIT, ioaddr + GMAC_CONTROL);
 
        /* Mask GMAC interrupts */
-       value = GMAC_INT_DEFAULT_MASK;
-
-       if (hw->pcs)
-               value &= ~GMAC_INT_DISABLE_PCS;
-
-       writel(value, ioaddr + GMAC_INT_MASK);
+       writel(GMAC_INT_DEFAULT_MASK, ioaddr + GMAC_INT_MASK);
 
 #ifdef STMMAC_VLAN_TAG_USED
        /* Tag detection without filtering */
index 6dd84b6544cc0ea233406b4cf24b46f23046ff01..3cb733781e1e89f57ff66d0490aa88e9e9d56249 100644 (file)
 #define GMAC_INT_LPI_EN                        BIT(5)
 #define GMAC_INT_TSIE                  BIT(12)
 
-#define        GMAC_PCS_IRQ_DEFAULT    (GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE)
-
 #define        GMAC_INT_DEFAULT_ENABLE (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN | \
                                 GMAC_INT_TSIE)
 
index 6269407d70cd22a61adef2b509b082a48d966e75..a4282fd7c3c739b0b72a7908ebc922c07281337f 100644 (file)
@@ -27,7 +27,8 @@ static int dwmac4_pcs_init(struct stmmac_priv *priv)
        if (!priv->dma_cap.pcs)
                return 0;
 
-       return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE);
+       return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
+                                         GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE);
 }
 
 static void dwmac4_core_init(struct mac_device_info *hw,
@@ -46,12 +47,7 @@ static void dwmac4_core_init(struct mac_device_info *hw,
        writel((clk_rate / 1000000) - 1, ioaddr + GMAC4_MAC_ONEUS_TIC_COUNTER);
 
        /* Enable GMAC interrupts */
-       value = GMAC_INT_DEFAULT_ENABLE;
-
-       if (hw->pcs)
-               value |= GMAC_PCS_IRQ_DEFAULT;
-
-       writel(value, ioaddr + GMAC_INT_EN);
+       writel(GMAC_INT_DEFAULT_ENABLE, ioaddr + GMAC_INT_EN);
 
        if (GMAC_INT_DEFAULT_ENABLE & GMAC_INT_TSIE)
                init_waitqueue_head(&priv->tstamp_busy_wait);
index 50ea51d7a1cc86a594d7d87e95e21d982b840cd7..e2f531c1198682c9fba21f56793999d699b920e6 100644 (file)
@@ -2,6 +2,22 @@
 #include "stmmac.h"
 #include "stmmac_pcs.h"
 
+static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)
+{
+       struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
+
+       stmmac_mac_irq_modify(spcs->priv, 0, spcs->int_mask);
+
+       return 0;
+}
+
+static void dwmac_integrated_pcs_disable(struct phylink_pcs *pcs)
+{
+       struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);
+
+       stmmac_mac_irq_modify(spcs->priv, spcs->int_mask, 0);
+}
+
 static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,
                                           unsigned int neg_mode,
                                           struct phylink_link_state *state)
@@ -23,11 +39,14 @@ static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,
 }
 
 static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {
+       .pcs_enable = dwmac_integrated_pcs_enable,
+       .pcs_disable = dwmac_integrated_pcs_disable,
        .pcs_get_state = dwmac_integrated_pcs_get_state,
        .pcs_config = dwmac_integrated_pcs_config,
 };
 
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset)
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
+                              u32 int_mask)
 {
        struct stmmac_pcs *spcs;
 
@@ -37,6 +56,7 @@ int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset)
 
        spcs->priv = priv;
        spcs->base = priv->ioaddr + offset;
+       spcs->int_mask = int_mask;
        spcs->pcs.ops = &dwmac_integrated_pcs_ops;
 
        __set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
index 64397ac8ecab8ab173ffd54b6ab4c7b74c84aca8..cda93894168e21fbb76a0ab1d2875f13882d9346 100644 (file)
@@ -52,6 +52,7 @@ struct stmmac_priv;
 struct stmmac_pcs {
        struct stmmac_priv *priv;
        void __iomem *base;
+       u32 int_mask;
        struct phylink_pcs pcs;
 };
 
@@ -61,7 +62,8 @@ phylink_pcs_to_stmmac_pcs(struct phylink_pcs *pcs)
        return container_of(pcs, struct stmmac_pcs, pcs);
 }
 
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset);
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
+                              u32 int_mask);
 
 /**
  * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR