[PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition

The condition is RISCV_FUSE_ZEXTH, which is a mistake.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition.

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index d9b45f17a1b83f4687f0801612a785241f9a8690..c6784a221274345d805f0dbc726d448cf9b74f31 100644 (file)
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8096,8 +8096,9 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
   if (!riscv_macro_fusion_p ())
     return false;
 
-  if (simple_sets_p && (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) ||
-                       riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH)))
+  if (simple_sets_p
+      && (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW)
+         || riscv_fusion_enabled_p (RISCV_FUSE_ZEXTWS)))
     {
       /* We are trying to match the following:
           prev (slli) == (set (reg:DI rD)