media: imx: imx7-media-csi: Don't enable SOF and EOF interrupts

The SOF and EOF interrupts are not used. Don't enable them.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c
index 4a8d48495701ae0254a76ef6f7b02eadf78e2b9d..475c39b05f9a0cce1950ceb0ad1aae5841562f89 100644 (file)
--- a/drivers/staging/media/imx/imx7-media-csi.c
+++ b/drivers/staging/media/imx/imx7-media-csi.c
@@ -240,15 +240,10 @@ static void imx7_csi_hw_enable_irq(struct imx7_csi *csi)
 {
        u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
 
-       cr1 |= BIT_SOF_INTEN;
        cr1 |= BIT_RFF_OR_INT;
-
-       /* still capture needs DMA interrupt */
        cr1 |= BIT_FB1_DMA_DONE_INTEN;
        cr1 |= BIT_FB2_DMA_DONE_INTEN;
 
-       cr1 |= BIT_EOF_INT_EN;
-
        imx7_csi_reg_write(csi, cr1, CSI_CSICR1);
 }
 
@@ -256,11 +251,9 @@ static void imx7_csi_hw_disable_irq(struct imx7_csi *csi)
 {
        u32 cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
 
-       cr1 &= ~BIT_SOF_INTEN;
        cr1 &= ~BIT_RFF_OR_INT;
        cr1 &= ~BIT_FB1_DMA_DONE_INTEN;
        cr1 &= ~BIT_FB2_DMA_DONE_INTEN;
-       cr1 &= ~BIT_EOF_INT_EN;
 
        imx7_csi_reg_write(csi, cr1, CSI_CSICR1);
 }
@@ -322,17 +315,6 @@ static void imx7_csi_dmareq_rff_disable(struct imx7_csi *csi)
        imx7_csi_reg_write(csi, cr3, CSI_CSICR3);
 }
 
-static void imx7_csi_sw_reset(struct imx7_csi *csi)
-{
-       imx7_csi_rx_fifo_clear(csi);
-
-       imx7_csi_dma_reflash(csi);
-
-       usleep_range(2000, 3000);
-
-       imx7_csi_irq_clear(csi);
-}
-
 static void imx7_csi_update_buf(struct imx7_csi *csi, dma_addr_t phys,
                                int buf_num)
 {
@@ -559,10 +541,18 @@ static void imx7_csi_deinit(struct imx7_csi *csi)
 
 static void imx7_csi_enable(struct imx7_csi *csi)
 {
-       imx7_csi_sw_reset(csi);
+       /* Clear the Rx FIFO and reflash the DMA controller. */
+       imx7_csi_rx_fifo_clear(csi);
+       imx7_csi_dma_reflash(csi);
 
-       imx7_csi_dmareq_rff_enable(csi);
+       usleep_range(2000, 3000);
+
+       /* Clear and enable the interrupts. */
+       imx7_csi_irq_clear(csi);
        imx7_csi_hw_enable_irq(csi);
+
+       /* Enable the RxFIFO DMA and the CSI. */
+       imx7_csi_dmareq_rff_enable(csi);
        imx7_csi_hw_enable(csi);
 }