+++ /dev/null
-From f5c1fb0d77017f55a010700662c68587628c740f Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 15 Jan 2024 12:03:03 +0100
-Subject: ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-
-[ Upstream commit 090c4094574705b0afc7d37825cdc5d06f0e7e02 ]
-
-External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
-and overridden in the board .dts when present.
-
-Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
-oscillator present on the APE6-EVM board.
-
-Fixes: a76809a329d6ebae ("ARM: shmobile: r8a73a4: Common clock framework DT description")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 12 ++++++++++++
- arch/arm/boot/dts/r8a73a4.dtsi | 9 ++++++---
- 2 files changed, 18 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index d530f451467e2..c077a7c1874a6 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -184,6 +184,18 @@ &cmt1 {
- status = "okay";
- };
-
-+&extal1_clk {
-+ clock-frequency = <26000000>;
-+};
-+
-+&extal2_clk {
-+ clock-frequency = <48000000>;
-+};
-+
-+&extalr_clk {
-+ clock-frequency = <32768>;
-+};
-+
- &pfc {
- scifa0_pins: scifa0 {
- groups = "scifa0_data";
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 4447f45f0cba9..48121ef690c9d 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -494,17 +494,20 @@ clocks {
- extalr_clk: extalr {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <32768>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal1_clk: extal1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <25000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal2_clk: extal2 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <48000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- fsiack_clk: fsiack {
- compatible = "fixed-clock";
---
-2.43.0
-
wifi-b43-stop-correct-queue-in-dma-worker-when-qos-i.patch
wifi-b43-disable-qos-for-bcm4331.patch
wifi-mwifiex-debugfs-drop-unnecessary-error-check-fo.patch
-arm-dts-renesas-r8a73a4-fix-external-clocks-and-cloc.patch
cpufreq-brcmstb-avs-cpufreq-add-check-for-cpufreq_cp.patch
sock_diag-annotate-data-races-around-sock_diag_handl.patch
af_unix-annotate-data-race-of-gc_in_progress-in-wait.patch
+++ /dev/null
-From c5913a6677aab037f904ae4c749e1de0a3f55eb8 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 15 Jan 2024 12:03:03 +0100
-Subject: ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-
-[ Upstream commit 090c4094574705b0afc7d37825cdc5d06f0e7e02 ]
-
-External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
-and overridden in the board .dts when present.
-
-Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
-oscillator present on the APE6-EVM board.
-
-Fixes: a76809a329d6ebae ("ARM: shmobile: r8a73a4: Common clock framework DT description")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 12 ++++++++++++
- arch/arm/boot/dts/r8a73a4.dtsi | 9 ++++++---
- 2 files changed, 18 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index b088e8e351d54..1028f721b38b0 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -208,6 +208,18 @@ &cmt1 {
- status = "okay";
- };
-
-+&extal1_clk {
-+ clock-frequency = <26000000>;
-+};
-+
-+&extal2_clk {
-+ clock-frequency = <48000000>;
-+};
-+
-+&extalr_clk {
-+ clock-frequency = <32768>;
-+};
-+
- &pfc {
- scifa0_pins: scifa0 {
- groups = "scifa0_data";
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index e5fb1ce261f72..bcde8d1005976 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -494,17 +494,20 @@ clocks {
- extalr_clk: extalr {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <32768>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal1_clk: extal1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <25000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal2_clk: extal2 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <48000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- fsiack_clk: fsiack {
- compatible = "fixed-clock";
---
-2.43.0
-
wifi-rtl8xxxu-add-cancel_work_sync-for-c2hcmd_work.patch
wifi-wilc1000-fix-multi-vif-management-when-deleting.patch
wifi-mwifiex-debugfs-drop-unnecessary-error-check-fo.patch
-arm-dts-renesas-r8a73a4-fix-external-clocks-and-cloc.patch
cpufreq-brcmstb-avs-cpufreq-add-check-for-cpufreq_cp.patch
sock_diag-annotate-data-races-around-sock_diag_handl.patch
inet_diag-annotate-data-races-around-inet_diag_table.patch
+++ /dev/null
-From d3a149dc36662735a705d5a70da2174d5a8223d2 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 15 Jan 2024 12:03:03 +0100
-Subject: ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-
-[ Upstream commit 090c4094574705b0afc7d37825cdc5d06f0e7e02 ]
-
-External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
-and overridden in the board .dts when present.
-
-Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
-oscillator present on the APE6-EVM board.
-
-Fixes: a76809a329d6ebae ("ARM: shmobile: r8a73a4: Common clock framework DT description")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 12 ++++++++++++
- arch/arm/boot/dts/r8a73a4.dtsi | 9 ++++++---
- 2 files changed, 18 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index b088e8e351d54..1028f721b38b0 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -208,6 +208,18 @@ &cmt1 {
- status = "okay";
- };
-
-+&extal1_clk {
-+ clock-frequency = <26000000>;
-+};
-+
-+&extal2_clk {
-+ clock-frequency = <48000000>;
-+};
-+
-+&extalr_clk {
-+ clock-frequency = <32768>;
-+};
-+
- &pfc {
- scifa0_pins: scifa0 {
- groups = "scifa0_data";
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index c39066967053f..d1f4cbd099efb 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -450,17 +450,20 @@ clocks {
- extalr_clk: extalr {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <32768>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal1_clk: extal1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <25000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal2_clk: extal2 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <48000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- fsiack_clk: fsiack {
- compatible = "fixed-clock";
---
-2.43.0
-
wifi-rtl8xxxu-add-cancel_work_sync-for-c2hcmd_work.patch
wifi-wilc1000-fix-multi-vif-management-when-deleting.patch
wifi-mwifiex-debugfs-drop-unnecessary-error-check-fo.patch
-arm-dts-renesas-r8a73a4-fix-external-clocks-and-cloc.patch
cpufreq-brcmstb-avs-cpufreq-add-check-for-cpufreq_cp.patch
cpufreq-explicitly-include-correct-dt-includes.patch
cpufreq-mediatek-hw-wait-for-cpu-supplies-before-pro.patch
+++ /dev/null
-From b53384f6c1c9f86651745dd7cb122a29b34e874e Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Mon, 15 Jan 2024 12:03:03 +0100
-Subject: ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-
-[ Upstream commit 090c4094574705b0afc7d37825cdc5d06f0e7e02 ]
-
-External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
-and overridden in the board .dts when present.
-
-Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
-oscillator present on the APE6-EVM board.
-
-Fixes: a76809a329d6ebae ("ARM: shmobile: r8a73a4: Common clock framework DT description")
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
-Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 12 ++++++++++++
- arch/arm/boot/dts/r8a73a4.dtsi | 9 ++++++---
- 2 files changed, 18 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index a5351ddbf5060..a396f403c9091 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -211,6 +211,18 @@ &cmt1 {
- status = "okay";
- };
-
-+&extal1_clk {
-+ clock-frequency = <26000000>;
-+};
-+
-+&extal2_clk {
-+ clock-frequency = <48000000>;
-+};
-+
-+&extalr_clk {
-+ clock-frequency = <32768>;
-+};
-+
- &pfc {
- scifa0_pins: scifa0 {
- groups = "scifa0_data";
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 4447f45f0cba9..48121ef690c9d 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -494,17 +494,20 @@ clocks {
- extalr_clk: extalr {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <32768>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal1_clk: extal1 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <25000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- extal2_clk: extal2 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
-- clock-frequency = <48000000>;
-+ /* This value must be overridden by the board. */
-+ clock-frequency = <0>;
- };
- fsiack_clk: fsiack {
- compatible = "fixed-clock";
---
-2.43.0
-
wifi-wilc1000-fix-declarations-ordering.patch
wifi-wilc1000-fix-rcu-usage-in-connect-path.patch
wifi-mwifiex-debugfs-drop-unnecessary-error-check-fo.patch
-arm-dts-renesas-r8a73a4-fix-external-clocks-and-cloc.patch
cpufreq-brcmstb-avs-cpufreq-add-check-for-cpufreq_cp.patch
sock_diag-annotate-data-races-around-sock_diag_handl.patch
af_unix-annotate-data-race-of-gc_in_progress-in-wait.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
